Signal processing apparatus and non-transitory computer-readable storage medium
AssigneeCanon Kabushiki Kaisha
InventorTakeshi Ogawa
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Abstract
This invention provides a signal processing apparatus which comprises a CPU and a programmable signal processor which has a plurality of execution units, a register file having a plurality of registers connected serially, and a shift controller which issues a shift signal to shift data held in the register file when each of the execution units has completed execution of a program of one cycle. Each of the execution units, after the execution of the program of one cycle, re-executes the program in accordance with the reception of the shift signal. The CPU stores, to a program memory in each of the execution units, a program including instructions to store data of a result of processing to one of registers so that the other execution unit refers the data in next cycle.
Claims14
A signal processing apparatus comprising:
- a central processing unit (CPU);
- and
- a programmable signal processing circuit having the following:
- a plurality of execution circuits each of which has a program memory and executes a program stored in the program memory,
- wherein the plurality of execution circuits can operate in parallel;
- a register file used for the plurality of execution circuits,
- wherein the register file has a plurality of registers serially connected and transfers, in accordance with a shift signal, data held by each of the plurality of registers to a register located downstream;
- a shift controller that issues the shift signal to the plurality of execution circuits at a timing at which the plurality of execution circuits do not execute the program,
- wherein the CPU stores, to each program memory of the plurality of execution circuits, a program including instructions to make a register of the register file located upstream of a register that a second execution circuit of the plurality of execution circuits is to reference in order to input data be a storage destination for data of a result by execution of the program by a first execution circuit of the plurality of execution circuits so that the data of the result by the execution of the program by the first execution circuit is transferred to the second execution circuit via the register file.
A non-transitory computer-readable storage medium storing programs to be executed by a signal processing apparatus comprising:
- a central processing unit (CPU);
- and
- a programmable signal processing circuit having the following:
- a plurality of execution circuits each of which has a program memory and executes a program stored in the program memory,
- wherein the plurality of execution circuits can operate in parallel;
- a register file used for the plurality of execution circuits,
- wherein the register file has a plurality of registers serially connected and transfers, in accordance with a shift signal, data held by each of the plurality of registers to a register located downstream;
- a shift controller that issues the shift signal to the plurality of execution circuits at a timing at which the plurality of execution circuits do not execute the program,
- wherein the program stored in the storage medium causes the CPU to store, to each program memory of the plurality of execution circuits, a program including instructions to make a register of the register file located upstream of a register that a second execution circuit of the plurality of execution circuits is to reference in order to input data be a storage destination for data of a result by execution of the program by a first execution circuit of the plurality of execution circuits so that the data of the result by the execution of the program by the first execution circuit is transferred to the second execution circuit via the register file.
Dependencies are inferred from the claim text.