Electro static discharge circuit and memory
AssigneeChangxin Memory Technologies, Inc.
InventorsYingdong Guo, Kai Tian, Wei Jiang, Jing Xu
Life of this patent
Estimating the term…
Abstract
Provided are an Electro Static Discharge (ESD) circuit and a memory. The ESD circuit includes: a detection circuit and multiple electrostatic discharge circuits. The detection circuit includes at least one sub-detection circuit connected between a first power end and a second power end. Each sub-detection circuit generates a sub-trigger signal based on a voltage change between the first power end and the second power end. The multiple electrostatic discharge circuits are connected between the first power end and the second power end. The multiple electrostatic discharge circuits are configured to be turned on according to the one or more sub-trigger signals.
Claims14
An Electro Static Discharge (ESD) circuit, comprising:
- a detection circuit, which comprises at least one sub-detection circuit connected between a first power end and a second power end, each sub-detection circuit is configured to generate a sub-trigger signal based on a voltage change between the first power end and the second power end;
- and
- multiple electrostatic discharge circuits, which are connected between the first power end and the second power end, the multiple electrostatic discharge circuits are configured to be turned on according to one or more sub-trigger signals;
- wherein the first power end comprises multiple sub-power ends, at least one electrostatic discharge circuit is connected between each sub-power end and the second power end, each sub-detection circuit and each sub-power end are connected or disconnected through a first selection circuit, each sub-detection circuit and an electrostatic discharge circuit corresponding to each sub-power end are connected or disconnected through a second selection circuit, one sub-detection circuit is connected to only one sub-power end through the first selection circuit and the one sub-detection circuit is connected to an electrostatic discharge circuit corresponding to the one sub-power end through the second selection circuit.
A memory, comprising an Electro Static Discharge (ESD) circuit, the ESD circuit comprising:
- a detection circuit, which comprises at least one sub-detection circuit connected between a first power end and a second power end, each sub-detection circuit is configured to generate a sub-trigger signal based on a voltage change between the first power end and the second power end;
- and
- multiple electrostatic discharge circuits, which are connected between the first power end and the second power end, the multiple electrostatic discharge circuits are configured to be turned on according to one or more sub-trigger signals;
- wherein the first power end comprises multiple sub-power ends, at least one electrostatic discharge circuit is connected between each sub-power end and the second power end, each sub-detection circuit and each sub-power end are connected or disconnected through a first selection circuit, each sub-detection circuit and an electrostatic discharge circuit corresponding to each sub-power end are connected or disconnected through a second selection circuit, one sub-detection circuit is connected to only one sub-power end through the first selection circuit and the one sub-detection circuit is connected to an electrostatic discharge circuit corresponding to the one sub-power end through the second selection circuit.
Dependencies are inferred from the claim text.