Integrated circuit device

An integrated circuit device, comprising:

• a substrate having a cell region, a peripheral region, and a transition region between the cell region and the peripheral region;
• an isolation feature in the transition region, wherein a bottom surface of the isolation feature has a step;
• a memory cell over the cell region of the substrate;
• a semiconductor device over the peripheral region of the substrate;
• and
• an interlayer dielectric layer over the isolation feature, wherein a bottom surface of the interlayer dielectric layer has a first portion and a second portion lower than the first portion of the bottom surface of the interlayer dielectric layer, and the step of the bottom surface of the isolation feature is directly below the second portion of the bottom surface of the interlayer dielectric layer.

An integrated circuit device, comprising:

• a substrate having a cell region, a peripheral region, and a transition region between the cell region and the peripheral region;
• a first isolation feature in the transition region, wherein a bottom surface of the first isolation feature has a first portion, a second portion between the cell region and the first portion, and a step connecting the first portion to the second portion, a top surface of the first isolation feature has a first portion, a second portion lower than the first portion of the top surface of the first isolation feature, and a connecting portion connecting the first portion of the top surface of the first isolation feature to the second portion of the top surface of the first isolation feature, and the connecting portion of the top surface of the first isolation feature vertically overlaps the first portion of the bottom surface of the first isolation feature;
• a memory cell over the cell region of the substrate;
• and
• a semiconductor device over the peripheral region of the substrate.