Implied directory state updates

An apparatus comprising:

• a processor;
• a port to couple the processor to a memory device over an interconnect, wherein the interconnect comprises a physical layer and the physical layer is based on a protocol to support link layer data of multiple different protocols, wherein the multiple different protocols comprise a memory protocol and at least one other different interconnect protocol, wherein the port comprises circuitry to support a link layer of at least the memory protocol, and the circuitry is to:
• identify a memory request associated with memory attached to the memory device;
• generate a flit based on the memory protocol, wherein the flit comprises a plurality of slots, a CRC field to carry a CRC value for the flit, request information associated with the memory request, a source identifier field to carry an identifier associated with the processor, and a directory state field to identify a directory state to be applied to a line in the memory in association with the memory request;
• and
• send the flit to the memory device on the interconnect.

A system comprising:

• a processor device;
• and
• a memory device coupled to the processor device by an interconnect, wherein the memory device is coupled to a memory and comprises:
• an interface to couple the memory device to the interconnect, the interface comprising circuitry to:
• receive a request flit from the processor device over the interconnect, the request flit is according to a flit format, wherein the request flit comprises a request associated with a line in the memory, the request flit comprises a field to identify a directory state to be applied to the line in association with the request, wherein the flit format defines a flit width and a plurality of slots to be included in flits based on the flit format;
• and
• send a response flit to the processor device on the interconnect, wherein the response flit is according to the flit format.