Constrained random simulation using machine learning and Bayesian estimation
AssigneeSynopsys, Inc.
InventorsBhuvnesh Kumar, Ganapathy Parthasarathy, Saurav Nanda, Sridhar Rajakumar
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Abstract
Certain aspects of the present disclosure are directed towards a method for circuit testing. The method generally includes: determining a probability distribution indicating prior failure probabilities associated with a circuit design; determining a first likelihood associated with occurrence of at least one failure for the circuit design; determining a quantity of test instances to be performed using simulation to detect the at least one failure based on the probability distribution and the first likelihood; and outputting the quantity of test instances.
Claims20
A method for coverage analysis, comprising:
- determining a probability distribution indicating prior failure probabilities associated with a circuit design;
- determining a first likelihood associated with occurrence of at least one failure for the circuit design;
- determining, by a processing device, a quantity of test instances to be performed using simulation to detect the at least one failure based on the probability distribution and the first likelihood;
- and
- outputting the quantity of test instances.
An apparatus for coverage analysis, comprising:
- a memory;
- and
- one or more processors coupled to the memory and configured to:
- determine a probability distribution indicating prior failure probabilities associated with a circuit design;
- determine a first likelihood associated with occurrence of at least one failure for the circuit design;
- determine a quantity of test instances to be performed using simulation to detect the at least one failure based on the probability distribution and the first likelihood;
- and
- output the quantity of test instances.
A non-transitory computer-readable medium having instructions stored thereon, that when executed by one or more processors, cause the one or more processors to:
- determining a probability distribution indicating prior failure probabilities associated with a circuit design;
- determining a likelihood associated with occurrence of at least one failure for the circuit design;
- determining a number of test instances to be performed using simulation to detect the at least one failure based on the probability distribution and the likelihood;
- and
- outputting the number of test instances.
Dependencies are inferred from the claim text.