Output signal generation device, control circuit, storage medium, and phase correction method
AssigneeMitsubishi Electric Corporation
InventorMichiya Hayama
Life of this patent
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Abstract
An output signal generation device includes: two or more signal output blocks that each include two or more serial output circuits and a signal multiplex unit, the serial output circuits controlling amplitudes of data signals having different delay times and each outputting a first serial signal, the signal multiplex unit electrically multiplexing the first serial signals outputted from the two or more serial output circuits, and output a second serial signal obtained by electrical multiplex of the signal multiplex unit; and a phase correction unit that controls a phase of the second serial signal outputted from the two or more signal output blocks by changing the amplitude of the first serial signal outputted from the serial output circuit.
Claims20
An output signal generation device comprising:
- two or more signal output circuitries each including two or more serial output circuits and a signal multiplexer, the serial output circuits controlling amplitudes of data signals having different delay times and each outputting a first serial signal, the signal multiplexer electrically multiplexing the first serial signals outputted from the two or more of the serial output circuits, the signal output circuitries each being configured to output a second serial signal obtained by electrical multiplex of the signal multiplexer;
- and
- a phase corrector to control a phase of the second serial signal outputted from the two or more signal output circuitries by changing the amplitude of the first serial signal outputted from the serial output circuit.
A control circuit for controlling an output signal generation device, the control circuit causing the output signal generation device to perform:
- outputting, from two or more signal output circuitries each including two or more serial output circuits and a signal multiplexer, the serial output circuits controlling amplitudes of data signals having different delay times and each outputting a first serial signal, the signal multiplexer electrically multiplexing the first serial signals outputted from the two or more serial output circuits, a second signal obtained by electrical multiplex of the signal multiplexer;
- and
- controlling a phase of the second serial signal outputted from the two or more signal output circuitries by changing the amplitude of the first serial signal outputted from the serial output circuit.
A non-transitory computer readable medium in which instructions are stored,
- the instruction, when executed by an output signal generating device, causing the output signal generation device to perform:
- outputting, from two or more signal output circuitries each including two or more serial output circuits and a signal multiplexer, the serial output circuits controlling amplitudes of data signals having different delay times and each outputting a first serial signal, the signal multiplexer electrically multiplexing the first serial signals outputted from the two or more serial output circuits, a second signal obtained by electrical multiplex of the signal multiplexer;
- and
- controlling a phase of the second serial signal outputted from the two or more signal output circuitries by changing the amplitude of the first serial signal outputted from the serial output circuit.
A phase correction method comprising:
- a first step in which two or more signal output circuitries each include two or more serial output circuits and a signal multiplexer, the serial output circuits controlling amplitudes of data signals having different delay times and each outputting a first serial signal, the signal multiplexer electrically multiplexing the first serial signals outputted from the two or more serial output circuits, and output a second serial signal obtained by electrical multiplex of the signal multiplexer;
- and
- a second step in which a phase corrector controls a phase of the second serial signal outputted from the two or more signal output circuitries by changing the amplitude of the first serial signal outputted from the serial output circuit.
Dependencies are inferred from the claim text.