Systems and methods for on-chip noise measurements
AssigneeD-Wave Systems Inc.
InventorsJed D. Whittaker, Richard Harris, Rahul Deshpande
Life of this patent
Estimating the term…
Loading patent…
AssigneeD-Wave Systems Inc.
InventorsJed D. Whittaker, Richard Harris, Rahul Deshpande
Estimating the term…
Systems and methods for measuring noise in discrete regions of multi-layer superconducting fabrication stacks are described. Methods for measuring noise in spatial regions of a superconducting fabrication stacks may include the use of resonators, each having a different geometry. As many resonators as spatial regions are fabricated. Data collected from the resonators may be used to calculate fill fractions and spin densities for different spatial regions of the superconducting fabrication stack. The data may be collected via on-chip electron-spin resonance. The superconducting fabrications may be part of a fabrication stack for a superconducting processor, for example a quantum processor, and the spatial region studied may be proximate to qubit wiring layers.
A method of conducting spatial noise measurements in a superconducting fabrication stack, the superconducting fabrication stack comprising one or more material interfaces, the method comprising:
A method of conducting spatial noise measurements in a superconducting fabrication stack, the superconducting fabrication stack comprising a plurality of resonators, each resonator having a different resonator geometry, and the superconducting fabrication stack comprising a plurality of spatial regions, the method executed by a digital processor and comprising:
Dependencies are inferred from the claim text.