Printed circuit board
AssigneeSamsung Electro-Mechanics Co., Ltd.
InventorJung Soo Kim
Life of this patent
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Abstract
A printed circuit board includes an insulating layer; an interconnection layer disposed on the insulating layer, and including a plurality of metal pads for mounting a semiconductor chip thereon; and a solder resist layer disposed on the insulating layer and covering the interconnection layer, the solder resist layer having a plurality of openings respectively exposing at least a portion of at least one of the plurality of metal pads. A rectangular region created by substantially connecting outer edges of outermost openings among the plurality of openings in a straight line is substantially equally divided into a plurality of cells, and a ratio of areas of the metal pads disposed in each cell to an area of each cell is calculated, and when a maximum value thereof is PMax and a minimum value thereof is PMin, (PMax−PMin)*100≤20.
Claims32
A printed circuit board, comprising:
- an insulating layer;
- an interconnection layer disposed on the insulating layer, and including a plurality of metal pads for mounting a semiconductor chip thereon;
- and
- a solder resist layer disposed on the insulating layer and covering the interconnection layer, the solder resist layer having a plurality of openings respectively exposing at least a portion of at least one of the plurality of metal pads,
- wherein a rectangular region created by substantially connecting outer edges of outermost openings among the plurality of openings in a straight line is substantially equally divided into a plurality of cells, and a ratio of areas of the metal pads disposed in each cell to an area of each cell is calculated, and when a maximum value thereof is PMax and a minimum value thereof is PMin, (PMax−PMin)*100≤20.
A printed circuit board, comprising:
- an insulating portion;
- a plurality of metal pads disposed on the insulating portion, and for mounting a semiconductor chip thereon;
- and
- a first solder resist layer disposed on the insulating portion and covering the plurality of metal pads, the first solder resist layer having a plurality of first openings respectively exposing at least a portion of at least one of the plurality of metal pads,
- wherein a rectangular region created by substantially connecting outer edges of outermost first openings among the plurality of first openings in a straight line is substantially equally divided into n cells within a range having a horizontal length of 1.7 mm to 2.0 mm and a vertical length of 1.7 mm to 2.0 mm, and a ratio of areas of the metal pads disposed in each cell to a total area of the rectangular region is calculated, and when a maximum value thereof is QMax and a minimum value thereof is QMin, n*(QMax−QMin)*100≤20, where n is a positive integer.
A printed circuit board, comprising:
- an insulating layer;
- an interconnection layer disposed on the insulating layer, and including a plurality of metal pads for mounting a semiconductor chip thereon;
- and
- a solder resist layer disposed on the insulating layer and covering the interconnection layer, the solder resist layer having a plurality of openings respectively exposing at least a portion of at least one of the plurality of metal pads,
- wherein a rectangular region created by substantially connecting outer edges of outermost openings among the plurality of openings in a straight line is substantially equally divided into a plurality of cells, an average depth of the openings in each of the plurality of cells is t1, t2, . . . tn, respectively, and a ratio of an area of the metal pads disposed in each cell to an area of each cell are P1, P2, . . . Pn, respectively, where n is an integer equal to or greater than 3, t1, t2, . . . tn substantially satisfy a relationship of 0.22*{(P1, P2, . . . Pn)*100}*(μm)+m*(μm), respectively, where, m is a rational number equal to or greater than 0.
A printed circuit board, comprising:
- an insulating portion;
- a plurality of metal pads disposed on the insulating portion, and for mounting a semiconductor chip thereon;
- and
- a solder resist layer disposed on the insulating portion and covering the plurality of metal pads, the solder resist layer having a plurality of openings respectively exposing at least a portion of at least one of the plurality of metal pads,
- wherein a rectangular region created by substantially connecting outer edges of outermost openings among the plurality of openings in a straight line is substantially equally divided into n cells within a range having a horizontal length of 1.7 mm to 2.0 mm and a vertical length of 1.7 mm to 2.0 mm, an average depth of the openings in each of the plurality of cells is t1, t2, . . . tn, respectively, and a ratio of an area of the metal pads disposed in each cell to the total area of the rectangular region is Q1, Q2, . . . Qn, respectively, where n is an integer equal to or greater than 3, t1, t2, . . . tn substantially satisfies a relationship of 0.22*n*{(Q1, Q2, . . . Qn)*100}*(μm)+k*(μm), respectively, where k is a rational number equal to or greater than 0.
A method to determine whether a printed circuit board is suitable for a semiconductor chip mounted thereon, wherein the printed circuit board includes an insulating layer, a plurality of metal pads disposed on the insulating layer, and a solder resist layer disposed on the insulating layer and having a plurality of openings respectively exposing at least a portion of at least one of the plurality of metal pads, the method comprising:
- substantially equally dividing a rectangular region created by substantially connecting outer edges of outermost openings among the plurality of openings in a straight line into a plurality of cells;
- calculating a ratio of areas of the metal pads disposed in each cell to an area of each cell;
- and
- determining that the printed circuit board is suitable for the semiconductor chip mounted thereon based on a result that (PMax−PMin)*100 is equal to or less than a predetermined value, where PMax is a maximum value among the ratios for the plurality of cells and PMin is a minimum value among the ratios for the plurality of cells.
Dependencies are inferred from the claim text.