Reducing transistor breakdown in a power FET current sense stack

A method of forming an integrated circuit comprising:

• forming a first field effect transistor (FET) in or over a semiconductor substrate and having a first source, a first drain and a first buried layer all having a first conductivity type, and a first gate between the first source and the first drain;
• and
• forming a second FET in or over the semiconductor substrate and having a second source, a second drain and a second buried layer all having the first conductivity type, and a second gate between the second source and the second drain, the first and second FETs being configured to selectively conduct a current between a first circuit node and a second circuit node;
• and
• configuring the first source to receive a first potential with respect to the first buried layer and configuring the second source to receive a different second potential with respect to the second buried layer.