Memory controller, memory system, and memory control method

A method of controlling a nonvolatile memory, the nonvolatile memory including a plurality of memory areas, the plurality of memory areas including at least a first memory area and a second memory area, the method comprising:

• managing a level of wear of each of the plurality of memory areas;
• determining that the level of wear of the first memory area is lower than a first threshold;
• in response to determining that the level of wear of the first memory area is lower than the first threshold,
• deciding to perform a first encoding for encoding a first size of first data to generate a second size of a first parity for correcting an error in the first data such that a sum of the first size and the second size is equal to a size of each of the plurality of memory areas,
• performing the first encoding on the first data to generate the first parity, and
• writing the first data and the first parity into the first memory area;
• determining that the level of wear of the second memory area is higher than or equal to the first threshold;
• and
• in response to determining that the level of wear of the second memory area is higher than or equal to the first threshold,
• deciding to perform a second encoding for encoding a third size of second data to generate a fourth size of a second parity for correcting an error in the second data such that the third size is smaller than the first size, and a sum of the third size and the fourth size is equal to the size of each of the plurality of memory areas,
• performing the second encoding on the second data to generate the second parity, and
• writing the second data and the second parity into the second memory area.