Kickback reduction in bootstrapped switches
AssigneeQUALCOMM Incorporated
InventorsLei Sun, Elias Dagher, Dinesh Jagannath Alladi
Life of this patent
Estimating the term…
Abstract
A system includes a switch transistor, and a bootstrap circuit having an input and an output, wherein the output of the bootstrap circuit is coupled to a gate of the switch transistor. The system also includes a first buffer having an input and an output, wherein the output of the first buffer is coupled to a terminal of the switch transistor. The system further includes a second buffer having an input and an output, wherein the input of the second buffer is coupled to the input of the first buffer, and the output of the second buffer is coupled to the input of the bootstrap circuit.
Claims29
A system, comprising:
- a switch transistor;
- a bootstrap circuit having an input and an output, wherein the output of the bootstrap circuit is coupled to a gate of the switch transistor;
- a first buffer having an input and an output, wherein the output of the first buffer is coupled to a terminal of the switch transistor, the first buffer comprising:
- a first transistor having a gate, a source, and a drain, wherein the gate of the first transistor is coupled to the input of the first buffer, the drain of the first transistor is coupled to a first rail, and the source of the first transistor is coupled to the output of the first buffer;
- and
- a first load coupled between the output of the first buffer and a second rail;
- and
- a second buffer having an input and an output, wherein the input of the second buffer is coupled to the input of the first buffer, and the output of the second buffer is coupled to the input of the bootstrap circuit.
A system, comprising:
- a first switch transistor;
- a second switch transistor;
- a first bootstrap circuit having an input and an output, wherein the output of the first bootstrap circuit is coupled to a gate of the first switch transistor;
- a second bootstrap circuit having an input and an output, wherein the output of the second bootstrap circuit is coupled to a gate of the second switch transistor;
- a first buffer having a first input, a second input, a first output, and a second output, wherein the first output of the first buffer is coupled to a terminal of the first switch transistor, and the second output of the first buffer is coupled to a terminal of the second switch transistor;
- and
- a second buffer having a first input, a second input, a first output, and a second output, wherein the first input of the second buffer is coupled to the first input of the first buffer, the second input of the second buffer is coupled to the second input of the first buffer, the first output of the first buffer is coupled to the input of the first bootstrap circuit, and the second output of the first buffer is coupled to the input of the second bootstrap circuit.
A system, comprising:
- a switch transistor;
- a bootstrap circuit having an input and an output, wherein the output of the bootstrap circuit is coupled to a gate of the switch transistor;
- a first buffer having an input and an output, wherein the output of the first buffer is coupled to a terminal of the switch transistor;
- a second buffer having an input and an output, wherein the input of the second buffer is coupled to the input of the first buffer, and the output of the second buffer is coupled to the input of the bootstrap circuit;
- and
- a third buffer having an input and an output, wherein the output of the third buffer is coupled to the input of the first buffer and the input of the second buffer.
A system, comprising:
- a switch transistor;
- a bootstrap circuit having an input and an output, wherein the output of the bootstrap circuit is coupled to a gate of the switch transistor;
- a first buffer having an input and an output, wherein the output of the first buffer is coupled to a terminal of the switch transistor, the first buffer comprising a first transistor;
- a second buffer having an input and an output, wherein the input of the second buffer is coupled to the input of the first buffer, and the output of the second buffer is coupled to the input of the bootstrap circuit, the second buffer comprising a second transistor, wherein a gate area of the first transistor is larger than a gate area of the second transistor.
Dependencies are inferred from the claim text.