System for selectively adding noise pedestal to generated signal

A reference system for generating a clock signal with a tunable noise pedestal for driving a signal generator, the reference system comprising:

• a reference source configured to generate a reference signal having a first frequency;
• and
• a noise pedestal generator configured to selectively form a noise pedestal in the reference signal, wherein the noise pedestal generator comprises:
• a noise pedestal attenuator configured to attenuate the reference signal to degrade a noise floor of the reference signal;
• a variable gain amplifier (VGA) configured to adjust the attenuated reference signal to a desired signal level to provide an adjusted reference signal able to drive a multiplier chain at a target power, while maintaining the degraded noise floor;
• a bandpass filter configured to filter out excess noise from the adjusted reference signal to form the noise pedestal;
• and
• a switch arrangement configured to selectively input the reference signal to a first path including the noise pedestal attenuator and the VGA, and a second path bypassing the noise pedestal attenuator and the VGA, and to selectively output one of the adjusted reference signal from the first path and the reference signal from the second path to the signal generator, wherein the adjusted reference signal includes the noise pedestal;
• and
• a controller configured to control the switch arrangement to select one of the first path or the second path.

A signal generating system, comprising:

• a clock reference system configured to generate a clock signal with a tunable noise pedestal;
• and
• a signal generator configured to generate a radio frequency (RF) signal responsive to the clock signal from the clock reference system, the RF signal including the tunable noise pedestal from the clock signal,
• wherein the clock reference system comprises:
• a reference source configured to generate a reference signal having a first frequency;
• and
• a multiplier chain configured to multiply the reference signal to produce the clock signal having a second frequency greater than the first frequency, wherein the multiplier chain comprises:
• a noise pedestal generator configured to selectively form a noise pedestal in the reference signal, wherein the noise pedestal generator comprises:
• a noise pedestal attenuator configured to attenuate the reference signal to degrade a noise floor of the reference signal;
• a variable gain amplifier (VGA) configured to adjust the attenuated reference signal to a desired signal level to provide an adjusted reference signal able to drive a remainder of the multiplier chain at a target power, while maintaining the degraded noise floor;
• a bandpass filter configured to filter out excess noise from the adjusted reference signal to form the noise pedestal;
• and
• a switch arrangement configured to selectively input the reference signal to a first path including the noise pedestal attenuator and the VGA, and a second path bypassing the noise pedestal attenuator and the VGA,
• wherein the clock signal is based on the adjusted reference signal including the noise pedestal when the switch arrangement selectively inputs the reference signal to the first path, and the clock signal is based on the reference signal without the noise pedestal when the switch arrangement selectively inputs the reference signal to the second path.