Continuous time linear equalization (CTLE) feedback for tunable DC gain and mid-band correction

An analog front end (AFE) circuit comprising:

• a transimpedance amplifier (TIA);
• and
• a feedback circuit comprising:
• a first transistor connected between a first output of the feedback circuit and a first node connected to a first current source;
• a second transistor connected between a second output of the feedback circuit and a second node connected to a second current source;
• and
• a first tunable resistor coupled between the first node and the second node, wherein:
• a first input of the feedback circuit is connected to a first output of the TIA;
• a second input of the feedback circuit is connected to a second output of the TIA;
• the second output of the feedback circuit is connected to a first input of the TIA;
• the first output of the feedback circuit is connected to a second input of the TIA;
• the first input of the feedback circuit is connected to a gate terminal of the first transistor through a second tunable resistor;
• the second input of the feedback circuit is connected to a gate terminal of the second transistor through a third tunable resistor;
• the first output of the TIA is connected to the first input of the TIA through a fourth tunable resistor;
• and
• the second output of the TIA is connected to the second input of the TIA through a fifth tunable resistor.

A system comprising:

• a continuous time linear equalizer (CTLE) circuit;
• a transimpedance amplifier (TIA) connected at an output of the CTLE circuit;
• and
• a feedback circuit comprising:
• a first transistor connected between a first output of the feedback circuit and a first node connected to a first current source;
• a second transistor connected between a second output of the feedback circuit and a second node connected to a second current source;
• and
• a first tunable resistor coupled between the first node and the second node, wherein:
• a first input of the feedback circuit is connected to a first output of the TIA;
• a second input of the feedback circuit is connected to a second output of the TIA;
• the second output of the feedback circuit is connected to a first input of the TIA;
• the first output of the feedback circuit is connected to a second input of the TIA;
• the first input of the feedback circuit is connected to a gate terminal of the first transistor through a second tunable resistor;
• and
• the second input of the feedback circuit is connected to a gate terminal of the second transistor through a third tunable resistor.