IQ phase imbalance calibration using sampling clock delay adjustment
AssigneeGlobalFoundries U.S. Inc.
InventorsXiaozhe Fan, Mustapha Slamani
Life of this patent
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Abstract
A system for phase imbalance calibration, including: an in-phase (I) signal channel including an analog-to-digital converter (ADC) for sampling an I signal to provide a sampled I signal; a quadrature (Q) signal channel including an ADC for sampling a Q signal to provide a sampled Q signal; a sampling clock for controlling the sampling of the ADC on the I signal channel and the sampling of the ADC on the Q signal channel; and sampling clock delay circuitry for adjusting one of a sampling start time of the ADC on the I channel and a sampling start time of the ADC on the Q channel relative to one another such that the sampled I signal and the sampled Q signal are in phase.
Claims19
A system for phase imbalance calibration, comprising:
- an in-phase (I) signal channel including an analog-to-digital converter (ADC) for sampling an I signal to provide a sampled I signal;
- a quadrature (Q) signal channel including an ADC for sampling a Q signal to provide a sampled Q signal;
- a sampling clock for controlling the sampling of the ADC on the I signal channel and the sampling of the ADC on the Q signal channel;
- and
- sampling clock delay circuitry for adjusting one of a sampling start time of the ADC on the I channel and a sampling start time of the ADC on the Q channel relative to one another such that the sampled I signal and the sampled Q signal are in phase.
A method for phase imbalance calibration of a system, comprising:
- synchronizing a sampling of an in-phase (I) signal on an I signal channel of the system and a sampling of a quadrature (Q) signal on a Q signal channel of the system;
- adjusting a phase of a sampling clock to apply a sampling delay to one of the I signal and the Q signal;
- sampling the I and Q signals to provide I and Q samples;
- performing a fast Fourier transform (FFT) on the I and Q samples;
- determining an image rejection for the system based on the FFT;
- and
- comparing the image rejection for the system to a target value for the image rejection.
A phase imbalance calibrated system for measuring a phase imbalance of a device, comprising:
- an in-phase (I) signal channel including an analog-to-digital converter (ADC) for sampling an I signal from the device to provide a sampled I signal;
- a quadrature (Q) signal channel including an ADC for sampling a Q signal from the device to provide a sampled Q signal;
- a sampling clock for controlling a sampling of the ADC on the I signal channel and a sampling of the ADC on the Q signal channel;
- and
- sampling clock delay circuitry for adjusting one of a sampling start time of the ADC on the I channel and a sampling start time of the ADC on the Q channel relative to one another based on a sampling delay stored in a memory.
Dependencies are inferred from the claim text.