Processing unit, method and computer program for multiplication

A method for operating a processing unit configured to multiply a first value by at least one multiplicand, the method comprising the following steps:

• providing two exponents, a value, and a configuration bit, the configuration bit indicating whether the two exponents are assigned to exactly one multiplicand or are each assigned to a different multiplicand;
• executing a first bitshift of the value by a first number of places which corresponds to a value of a first exponent of the two exponents, and a second bitshift of the value by a second number of places which corresponds to a value of a second exponent of the two exponents;
• and
• outputting results of the first and second bitshifts as a function of the configuration bit, wherein when the configuration bit indicates that the two exponents are assigned to exactly one multiplicand, the results of the first and second bitshifts being added and outputted as a result of the multiplication, and when the configuration bit indicates that the two exponents are each assigned to a different multiplicand, the results of the first and second bitshifts each being outputted as a result of the multiplication of the value by, in each instance, one of the multiplicands.

A non-transitory machine-readable storage element on which is stored a computer program for operating a processing unit configured to multiply a first value by at least one multiplicand, the computer program, when executed by a computer, causing the following steps to be carried out:

• providing two exponents, a value, and a configuration bit, the configuration bit indicating whether the two exponents are assigned to exactly one multiplicand or are each assigned to a different multiplicand;
• executing a first bitshift of the value by a first number of places which corresponds to a value of a first exponent of the two exponents, and a second bitshift of the value by a second number of places which corresponds to a value of a second exponent of the two exponents;
• and
• outputting results of the first and second bitshifts as a function of the configuration bit, wherein when the configuration bit indicates that the two exponents are assigned to exactly one multiplicand, the results of the first and second bitshifts being added and outputted as a result of the multiplication, and when the configuration bit indicates that the two exponents are each assigned to a different multiplicand, the results of the first and second bitshifts each being outputted as a result of the multiplication of the value by, in each instance, one of the multiplicands.