# US 12,376,231 B2 · Three-dimensional (3D) copper in printed circuit boards > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 12,376,231 B2 - Document ID: US12376231B2 - Status: Granted - Kind: B2 - Application number: 18/601,668 - Filed: 2024-03-11 - Published: 2024-09-12 - Granted: 2025-07-29 - Earliest claimed: 2020-09-23 - Assignees: Apple Inc. - Applicants: Apple Inc. - Inventors: Anne M. Mason; Chad O. Simpson; William Hannon; Mark J. Beesley - Web page: https://patentgrep.com/patent/US12376231B2 ## CPC - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 3/0047: {Drilling of holes} - H05K 3/422: {characterised by electroless plating method; pretreatment therefor} - H05K 3/423: {characterised by electroplating method} - H05K 1/0265: {characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections} - H05K 3/4688: {Composite multilayer circuits, i.e. comprising insulating layers having different properties (having a special base or central core H05K3/4602)} - H05K 2201/09536: Buried plated through-holes, i.e. plated through-holes formed in a core before lamination - H05K 2201/09563: Metal filled via - H05K 2201/0959: Plated through-holes or plated blind vias filled with insulating material - H05K 2201/096: Vertically aligned vias, holes or stacked vias - H05K 2201/098: Special shape of the cross-section of conductors, e.g. very thick plated conductors - H05K 2203/107: Using laser light - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract Structures that implement three-dimensional (3D) conductive material (e.g., copper) in printed circuit boards (PCBs) are disclosed. 3D (three-dimensional) conductive material may include trenches and/or buried vias that are filled with conductive material in the PCBs. Trenches may be formed in build-up layers of a PCB by overlapping multiple laser drilled vias. The trenches may be filled with conductive material using electroplating process(es). Buried vias may be formed through the core layers of the PCB by mechanical drilling. The buried via may be filled with solid conductive material using a combination of electroless plating and electrolytic plating of conductive material. Various PCB structures are disclosed that implement combinations of these trenches and/or these buried vias filled with conductive material. ## Claims ### Claim 1 A printed circuit board, comprising: a core layer, wherein the core layer includes at least one core dielectric layer and at least one core conductive material layer; a vertical opening through the core layer; a plurality of build-up layers coupled to the core layer, wherein the build-up layers include at least one build-up dielectric layer and at least one build-up conductive material layer, wherein the build-up layers are positioned between the core layer and a first surface of the printed circuit board; a trench stack formed by two or more trenches in two or more of the build-up layers positioned vertically adjacent to the first surface of the printed circuit board, wherein the trenches are formed by groups of overlapping vias, a respective trench being formed in an individual build-up layer by a respective group of overlapping vias through the individual build-up layer, wherein the trench stack extends from a first horizontal position of first via in the groups of overlapping vias to a second horizontal position of last vias in the groups of overlapping vias, the second horizontal position being horizontally displaced from the first horizontal position, wherein both the first horizontal position and the second horizontal position are horizontally offset from a horizontal position of the vertical opening through the core layer, the trench stack having a depth below the first surface of the printed circuit board corresponding to a vertical height of the two or more build-up layers; and a trench conductive material filling the trench stack between the first horizontal position and the second horizontal position. ### Claim 2 (depends on 1) The printed circuit board of claim 1, wherein the trench stack has an exposed interface at the first surface of the printed circuit board along a length of the trench stack between the first horizontal position and the second horizontal position. ### Claim 3 (depends on 2) The printed circuit board of claim 2, wherein the exposed interface has a flat profile along a length of the trench stack between the first horizontal position and the second horizontal position. ### Claim 4 (depends on 2) The printed circuit board of claim 2, wherein the trench conductive material is exposed at the exposed interface along a length of the trench stack between the first horizontal position and the second horizontal position. ### Claim 5 (depends on 4) The printed circuit board of claim 4, wherein the trench conductive material has a substantially flat surface at the first surface of the printed circuit board, the trench conductive material being configured to couple a surface mount device to the printed circuit board. ### Claim 6 (depends on 1) The printed circuit board of claim 1, wherein the trench stack has a lower interface between a lowermost build-up layer comprising the overlapping vias and the build-up layer vertically below the overlapping vias, the lower interface extending along a length of the trench stack between the first horizontal position and the second horizontal position. ### Claim 7 (depends on 6) The printed circuit board of claim 6, wherein the lower interface of the trench stack has a flat profile along a length of the trench stack between the first horizontal position and the second horizontal position. ### Claim 8 (depends on 6) The printed circuit board of claim 6, wherein the lower interface of the trench stack further extends to the horizontal position of the vertical opening through the core layer. ### Claim 9 (depends on 1) The printed circuit board of claim 1, further comprising: a plurality of lower build-up layers coupled to the core layer, wherein the lower build-up layers include at least one build-up dielectric layer and at least one build-up conductive material layer, wherein the lower build-up layers are positioned between the core layer and a second surface of the printed circuit board, the second surface being an opposing surface from the first surface; a lower trench stack formed by two or more lower trenches in two or more of the lower build-up layers positioned vertically adjacent to the second surface of the printed circuit board, wherein the lower trenches are formed by lower groups of overlapping vias, a respective lower trench being formed in an individual lower build-up layer by a respective lower group of overlapping vias through the individual lower build-up layer, wherein the lower trench stack extends from a third horizontal position of first vias in the lower groups of overlapping vias to a fourth horizontal position of last vias in the lower groups of overlapping vias, the third horizontal position being horizontally displaced from the fourth horizontal position, the lower trench stack having a depth above the second surface of the printed circuit board corresponding to a vertical height of the two or more lower build-up layers; and an additional trench conductive material filling the lower trench stack between the third horizontal position and the fourth horizontal position. ### Claim 10 A printed circuit board, comprising: a core layer, wherein the core layer includes at least one core dielectric layer and at least one core conductive material layer; an opening through the core layer; a first buried via positioned in the opening through the core layer; a second buried via positioned in the opening through the core layer; a plurality of build-up layers coupled to the core layer, wherein the build-up layers include at least one build-up dielectric layer and at least one build-up conductive material layer, wherein the build-up layers are positioned between the core layer and a surface of the printed circuit board; a first trench stack formed by two or more first trenches in two or more of the build-up layers positioned vertically adjacent to the surface of the printed circuit board, wherein the first trenches are formed by first groups of overlapping vias, a respective first trench being formed in an individual build-up layer by a respective first group of overlapping vias through the individual build-up layer, wherein the first trench stack extends from a first horizontal position of first vias in the first groups of overlapping vias to a second horizontal position of last vias in the first groups of overlapping vias, the second horizontal position being horizontally displaced from the first horizontal position; a first trench conductive material filling the first trench stack and the first buried via, the first buried via being substantially filled with the first trench conductive material; a second trench stack formed by two or more second trenches in two or more of the build-up layers positioned vertically adjacent to the surface of the printed circuit board, wherein the second trenches are formed by second groups of overlapping vias, a respective second trench being formed in an individual build-up layer by a respective second group of overlapping vias through the individual build-up layer, wherein the second trench stack extends from a third horizontal position of first vias in the second group of overlapping vias to a fourth horizontal position of last vias in the second groups of overlapping vias, the fourth horizontal position being horizontally displaced from the third horizontal position; and a second trench conductive material filling the second trench stack and the second buried via, the second buried via being substantially filled with the second trench conductive material. ### Claim 11 (depends on 10) The printed circuit board of claim 10, wherein the third horizontal position is horizontally displaced from the second horizontal position. ### Claim 12 (depends on 10) The printed circuit board of claim 10, wherein the first trench stack and the first buried via have similar widths of the first trench conductive material. ### Claim 13 (depends on 10) The printed circuit board of claim 10, wherein the second trench stack and the second buried via have similar widths of the second trench conductive material. ### Claim 14 A printed circuit board, comprising: a core layer, wherein the core layer includes at least one core dielectric layer and at least one core conductive material layer; an opening through the core layer; a buried via positioned in the opening through the core layer; a plurality of first build-up layers coupled to the core layer, wherein the first build-up layers include at least one first build-up dielectric layer and at least one first build-up conductive material layer, wherein the first build-up layers are positioned between the core layer and a first surface of the printed circuit board; a plurality of second build-up layers coupled to the core layer, wherein the second build-up layers include at least one second build-up dielectric layer and at least one second build-up conductive material layer, wherein the second build-up layers are positioned between the core layer and a second surface of the printed circuit board, the second surface of the printed circuit board being on an opposite side of the core layer from the first surface; a first trench stack formed by two or more first trenches in two or more of the first build-up layers positioned vertically adjacent to the first surface of the printed circuit board, wherein the first trenches are formed by first groups of overlapping vias, a respective first trench being formed in an individual first build-up layer by a respective first group of overlapping vias through the individual first build-up layer, wherein the first trench stack extends from a first horizontal position of first vias in the first groups of overlapping vias to a second horizontal position of last vias in the first groups of overlapping vias, the second horizontal position being horizontally displaced from the first horizontal position; a first trench conductive material filling the first trench stack and the first buried via, the first buried via being substantially filled with the first trench conductive material; at least one second trench formed in at least one second build-up layer positioned vertically adjacent to the core layer, wherein the at least one second trench is formed by a second group of overlapping vias through the at least one second build-up layer, the at least one second trench extending from the first horizontal position to a third horizontal position that is horizontally offset from a horizontal position of the opening through the core layer; and a second trench conductive material filling the at least one second trench. ### Claim 15 (depends on 14) The printed circuit board of claim 14, wherein the second trench conductive material is connected to the first trench conductive material. ### Claim 16 (depends on 14) The printed circuit board of claim 14, wherein the at least one second trench is connected to the first trench stack by the first buried via. ### Claim 17 (depends on 14) The printed circuit board of claim 14, further comprising: a second trench stack formed by two or more third trenches in two or more of the build-up layers positioned vertically adjacent to the second surface of the printed circuit board, wherein the third trenches are formed by third groups of overlapping vias, a respective third trench being formed in an individual build-up layer by a respective third group of overlapping vias in the individual build-up layer, wherein the second trench stack extends from the third horizontal position to a fourth horizontal position, the fourth horizontal position being horizontally displaced from the first, second, and third horizontal positions; and a third trench conductive material filling the second trench stack. ### Claim 18 (depends on 17) The printed circuit board of claim 17, wherein the second trench stack is connected to the at least one second trench. ### Claim 19 (depends on 14) The printed circuit board of claim 14, further comprising: a second trench stack formed by at least one third trench in at least one core dielectric layer positioned vertically adjacent to the at least one second trench, wherein the at least one third trench is formed by a third group of overlapping vias through the at least one core dielectric layer, the second trench stack connecting the at least one core conductive material layer to the at least one second trench, wherein the second trench stack extends from the third horizontal position to a fourth horizontal position, the fourth horizontal position being horizontally displaced from the first, second, and third horizontal positions; and a third trench conductive material filling the second trench stack. ### Claim 20 (depends on 19) The printed circuit board of claim 19, wherein the second trench stack is formed in a portion of the core layer horizontally offset from the opening through the core layer.