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US 12,373,680 B2Granted
Deep neural network with multiple layers formed of multi-terminal logic gates
AssigneeMemComputing, Inc.
InventorFabio Lorenzo Traversa
Life of this patent
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Abstract
A deep neural network circuit with multiple layers formed of multi-terminal logic gates is provided. In one aspect, the neural network circuit includes a plurality of logic gates arranged into a plurality of layers and a plurality of logical connectors arranged between each pair of adjacent layers. Each of the logical connectors connects the output of a first logic gate to the input of a second logic gate and each of the logical connectors has one of a plurality of different logical connector states. The neural network circuit is configured to be trained to implement a function by finding a set of the logical connector states for the logical connectors such that the neural network circuit implements the function.
Claims20
A neural network circuit, comprising:
- a plurality of logic gates arranged into a plurality of layers, each of the logic gates having a plurality of inputs and an output;
- and
- a plurality of logical connectors arranged between each pair of adjacent layers, each of the logical connectors determining a relationship between the output of a first logic gate to one of the plurality of inputs of a second logic gate, and each of the logical connectors having one of a plurality of different logical connector states,
- wherein the neural network circuit is configured to be trained to implement a function by finding a set of the logical connector states for the logical connectors such that the neural network circuit implements the function, and
- wherein the logical connector states include a first state in which the output of the first logic gate is connected to the input of the second logic gate via a NOT gate and a second state in which the output of the first logic gate is connected to the input of the second logic gate via a short circuit.
2 more elements
A neural network circuit, comprising:
- a plurality of logic gates arranged into a plurality of layers, each of the logic gates having a plurality of inputs and an output;
- and
- a plurality of logical connectors arranged between each pair of adjacent layers, each of the logical connectors determining a relationship between the output of a first logic gate to one of the plurality of inputs of a second logic gate, and each of the logical connectors having one of a plurality of different logical connector states,
- wherein the neural network circuit is configured to be trained to implement a function by finding a set of the logical connector states for the logical connectors such that the neural network circuit implements the function, and
- wherein each of the logical connectors comprises:
- an input;
- a short circuit connected to the input;
- an inverter arranged in parallel with the short circuit and connected to the input;
- an output;
- and
- at least one switch configured to connect one of the short circuit and the inverter to the output.
8 more elements
A neural network circuit, comprising:
- a plurality of logic gates arranged into a plurality of layers, each of the logic gates having a plurality of inputs and an output;
- and
- a plurality of logical connectors arranged between each pair of adjacent layers, each of the logical connectors determining a relationship between the output of a first logic gate to one of the plurality of inputs of a second logic gate, and each of the logical connectors having one of a plurality of different logical connector states,
- wherein the neural network circuit is configured to be trained to implement a function by finding a set of the logical connector states for the logical connectors such that the neural network circuit implements the function,
- wherein each of the logical connectors comprises at least one of a short circuit or an inverter, and
- wherein each of the logical connectors connects an output of a logic gate of a previous layer to an input of a logic gate of a current layer.
3 more elements
A neural network circuit, comprising:
- a plurality of logic gates arranged into a plurality of layers, each of the logic gates having a plurality of inputs and an output;
- and
- a plurality of logical connectors arranged between each pair of adjacent layers, each of the logical connectors determining a relationship between the output of a first logic gate to one of the plurality of inputs of a second logic gate, and each of the logical connectors having one of a plurality of different logical connector states,
- wherein the neural network circuit is configured to be trained to implement a function by finding a set of the logical connector states for the logical connectors such that the neural network circuit implements the function,
- wherein each of the logical connectors has a fixed one of the logical connector states, and
- wherein each of the logical connectors comprises a single one of:
- a short circuit, an inverter, and an open circuit corresponding to the fixed one of the logical connector states.
4 more elements
A method of computing a function using a neural network circuit, comprising:
- providing a neural network circuit including:
- a plurality of logic gates arranged into a plurality of layers, each of the logic gates having a plurality of inputs and an output;
- and
- a plurality of logical connectors comprising sets of logical connectors arranged between each pair of adjacent layers, each of the logical connectors having one of a plurality of different logical connector states, wherein the plurality of logical connectors are programmed to implement a function;
- and
- computing the function for an input signal using the neural network,
- wherein the logical connector states include a first state in which the output of a first logic gate is connected to one of the plurality of inputs of a second logic gate via a NOT gate and a second state in which the output of the first logic gate is connected to the input of the second logic gate via a short circuit.
4 more elements
A method of computing a function using a neural network circuit, comprising:
- providing a neural network circuit including:
- a plurality of logic gates arranged into a plurality of layers, each of the logic gates having a plurality of inputs and an output;
- and
- a plurality of logical connectors comprising sets of logical connectors arranged between each pair of adjacent layers, each of the logical connectors having one of a plurality of different logical connector states
- finding a set of the logical connector states for the plurality of logical connectors such that the neural network circuit implements a function by at least:
- generating a set of integer linear programming (ILP) problems based on the function;
- and
- solving the set of ILP problems to produce the set of the logical connector states;
- programming the plurality of logical connectors such that the neural network implements the function;
- and
- computing the function for an input signal using the neural network.
8 more elements
A single chip, comprising:
- a plurality of logic gates arranged into a plurality of layers of a neural network circuit, each of the logic gates having a plurality of inputs and an output;
- a plurality of logical connectors arranged between logic gates of each pair of adjacent layers, each of the logical connectors determining a relationship between the output of a first logic gate to one of the plurality of inputs of a second logic gate, and each of the logical connectors having one of a plurality of different logical connector states;
- a plurality of input terminals;
- and
- at least one output terminal,
- wherein the chip is configured to compute a function between the input terminals and the output terminal,
- wherein the chip is configured to compute the function for a given input provided to the input terminals in ten clock cycles or fewer, and wherein the logical connector states include a first state in which the output of the first logic gate is connected to the input of the second logic gate via a NOT gate and a second state in which the output of the first logic gate is connected to the input of the second logic gate via a short circuit.
4 more elements
Dependencies are inferred from the claim text.