Data processing procedure for safety instrumentation and control (I and C) systems, I and C system platform, and design procedure for I and C system computing facilities

A method of creation of a computing facility for safety Instrumentation and Control (I&C) Systems, comprising of platform modules,

• wherein a platform logic and application logic are formed, wherein RadIC Platform Configuration Toolset (RPCT) toolset is designed, wherein functional block library is developed, therein application logic is described as a set of calls of function blocks from the library with step-by-step control by comparing results from duplicate function blocks and using the selection rule<<2oo2>>,
• that is distinguished by the fact that
• two levels of function execution are formed:
• platform—for performing safety and diagnostic functions independently of the user and which is a part of field-programmable gate array (FPGA) configuration;
• and user—user-defined operation logic that uses platform logic and all safety functions included in it to perform its functions and which is not part of FPGA platform configuration,
• RPCT toolset which is used for platform configuration, design and uploading of a logic for various applications, herewith the application logic is described in graphical form, is compiled, converted into a set of commands to call functions from the Logic Module library and is loaded into the Logic Module to perform application functions, while automated-based verification of application logic is provided using RPCT,
• where Functions Library is designed, which is a part of a platform logic and is called for execution in accordance with the command set generated after compilation in the development environment and loaded into the Logic Module so that a computing facility is described and implemented in FPGA of each platform modules as embedded platform logic and as finite-state machine with strictly determined execution time to execute commands for calling application logic functions, where the embedded platform logic using FPGA provides continuous control of all platform and user-level functions, including using a separate programmable logic chip (CPLD, Complex Programmable Logic Device) on a diverse technology in relation to the main FPGA, where a library of functions is developed with redundancy.