Systems and methods for variable bandwidth annealing
Assignee1372934 B.C. Ltd.
InventorLoren J. Swenson
Life of this patent
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Abstract
A filter multiplexer for variable bandwidth annealing selection is described. The filter multiplexer has multiple pathways, where each pathway comprises a switch and a filter. Each filter has a different cutoff frequency from the other filters. Switches may be cryogenic switches. Each pathway may be communicatively coupled to an external annealing line. Upon receiving a problem, an annealing bandwidth can be selected, set or configured via the multiplexer to operate a quantum processor with a desired annealing schedule. The multiplexer may be used for calibration of a quantum processor by performing a calibration with a large annealing bandwidth, then calibrating the quantum processor by iterating through all available annealing bandwidths from the multiplexer.
Claims16
A filter multiplexer system comprising:
- at least one external annealing line;
- a plurality of filters communicatively coupled to the at least one external annealing line, each filter of the plurality of filters having a different cutoff frequency;
- and
- a multiplexer, the multiplexer having an output line and a plurality of input lines, each input line in the plurality of input lines communicatively coupled to one filter in the plurality of filters, and a plurality of pathways, each pathway comprising at least one superconducting switch.
A system for variable annealing bandwidth selection comprising:
- a quantum annealing processor, the quantum annealing processor comprising a plurality of qubits and couplers, and a set of on-chip annealing lines, the on-chip annealing lines communicatively coupled to the plurality of qubits;
- at least one external annealing line;
- a plurality of filters communicatively coupled to the at least one external annealing line, each filter of the plurality of filters having a different cutoff frequency;
- and
- a multiplexer, the multiplexer having an output line and a plurality of input lines, each input line in the plurality of input lines communicatively coupled to the at least one filter in the plurality of filters, and a plurality of pathways, each pathway comprising at least one superconducting switch.
A method for variable bandwidth annealing in a quantum annealing processor system comprising a quantum annealing processor, the quantum annealing processor comprising a plurality of qubits, and a set of on-chip annealing lines, the on-chip annealing lines communicatively coupled to the plurality of qubits;
- at least one external annealing line;
- a plurality of filters communicatively coupled to the at least one external annealing line, at least two of the plurality of filters having a different cutoff frequency from one another;
- and a multiplexer, the multiplexer having an output line and a plurality of input lines, the output line of the multiplexer communicatively coupled to the on-chip annealing lines, each input line in the plurality of input lines communicatively coupled to the at least one filter in the plurality of filters, and a plurality of pathways, each pathway comprising at least one superconducting switch, the multiplexer able to provide a plurality of annealing bandwidth settings, the method comprising:
- setting an annealing bandwidth setting via the multiplexer;
- and
- causing the quantum processor to evolve according to the annealing bandwidth setting.
A method for calibrating a quantum annealing processor system comprising a quantum annealing processor, the quantum annealing processor comprising a plurality of qubits, and a set of on-chip annealing lines, the on-chip annealing lines communicatively coupled to the plurality of qubits;
- at least one external annealing line;
- a plurality of filters communicatively coupled to the at least one external annealing line, each filter of the plurality of filters having a different cutoff frequency from one another;
- and a multiplexer, the multiplexer having an output line and a plurality of input lines, the output line of the multiplexer communicatively coupled to the on-chip annealing lines, each input line in the plurality of input lines communicatively coupled to the at least one filter in the plurality of filters, and a plurality of pathways, each pathway comprising at least one superconducting switch, the multiplexer able to provide a plurality of annealing bandwidth settings, the method comprising:
- setting a large annealing bandwidth setting via the multiplexer;
- and
- performing a calibration of the quantum processor while causing the quantum processor to evolve according to the large annealing bandwidth setting.
Dependencies are inferred from the claim text.