Systems and methods for phase locked loop realignment with skew cancellation
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsung-Hsien Tsai, Ruey-Bin Sheen, Chih-Hsien Chang, Cheng-Hsiang Hsieh
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Abstract
Systems and methods are provided for a phase locked loop. A phase/frequency detector is configured to receive a reference signal and a feedback signal. A charge pump is configured to receive outputs from the phase/frequency detector and to generate pulses. An oscillator is configured to generate an output waveform based on the charge pump pulses. A realignment path is configured to generate a clock realignment signal that is provided to the oscillator based on the outputs from the phase/frequency detector.
Claims20
A phase locked loop comprising:
- a charge pump;
- an oscillator;
- a filter between the charge pump and the oscillator;
- and
- a realignment path configured to generate a clock realignment signal, wherein the clock realignment signal is based on a first output that is from the charge pump and that bypasses the filter, wherein the charge pump comprises a first matching gate configured to receive the first output.
A method of generating a periodic output waveform, comprising:
- generating a clock realignment signal based on an output from a charge pump;
- and
- providing the output to a first alignment logic gate such that the output bypasses a filter, wherein the charge pump comprises a second realignment logic gate configured to receive the output.
A clock generation circuit comprising:
- a charge pump configured to receive an input signal, to generate an output signal based on the input signal, and to generate pulse signals based on the output signal after the output signal is routed through a first alignment logic gate;
- and
- a realignment circuit configured to generate a realignment signal based on the output signal after the output signal bypasses a filter and is routed through a second alignment logic gate.
Dependencies are inferred from the claim text.