Circuit and method for timestamp jitter reduction
AssigneeMarvell Asia Pte Ltd
InventorsEliya Babitsky, Moran Noiman, Adi Katz, Yaakov Yehezkel, Ofer Halili, Tal Robinson
Life of this patent
Estimating the term…
Loading patent…
AssigneeMarvell Asia Pte Ltd
InventorsEliya Babitsky, Moran Noiman, Adi Katz, Yaakov Yehezkel, Ofer Halili, Tal Robinson
Estimating the term…
A circuit and corresponding method generate a filtered timestamp. The circuit comprises recursive filter logic. The circuit generates the filtered timestamp from a received timestamp by filtering the received timestamp via the recursive filter logic. The recursive filter logic reduces jitter in the filtered timestamp relative to jitter of the received timestamp. The jitter represents a deviation of the received timestamp from a target (ideal) timestamp. The circuit outputs the filtered timestamp generated. The filtered timestamp is a more accurate representation of the target timestamp, relative to the received timestamp, due to the jitter reduced.
A circuit comprising:
A method comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.