SRAM memory cell device comprising ferroelectric access and storage transistors

An access transistor of a static random-access memory (SRAM) cell which comprises a pair of pull-up transistors connected to a first reference node and a pair of pull-down transistors connected to a second reference node, the access transistor comprises:

• a substrate;
• a source, coupled to a first terminal of one of the pair of pull-up transistors and a second terminal of one of the pair of pull-down transistors;
• a drain, coupled to a bit line;
• a gate stack structure, disposed over the substrate, coupled to a word line, wherein the gate stack structure comprises:
• a gate oxide layer, disposed over the substrate;
• a ferroelectric layer, disposed over the gate oxide layer, wherein the ferroelectric layer has a negative capacitance effect;
• and
• a first conductive layer, disposed over the ferroelectric layer,
• wherein a threshold voltage of the access transistor is changed from a first threshold voltage to a second threshold voltage by biasing to the gate stack structure of the access transistor with a bias voltage greater than an operating voltage of the access transistor, biasing the source or the drain of the access transistor with a ground voltage, and biasing the first reference node and the second reference node with the ground voltage during a pre-program operation,
• the access transistor is turned on by biasing the gate stack structure of the access transistor with the operating voltage before and after the pre-program operation,
• the threshold voltage of the access transistor is greater than threshold voltages of the pair of pull-up transistors and the threshold voltage of the access transistor is smaller than threshold voltages of the pair of pull-down transistors regardless of logic state stored in the SRAM cell, the threshold voltage of the access transistor is a minimum voltage between a gate of the access transistor and the source of the access transistor to form a conducting path between the source and the drain of the access transistor, and the threshold voltage of the access transistor is independent from the logic state stored in the SRAM cell.

A method of changing a threshold voltage of an access transistor of a static random-access memory (SRAM) cell which comprises a pair of pull-up transistors connected to a first reference node and a pair of pull-down transistors connected to a second reference node and the access transistor, the access transistor comprises a substrate, a source coupled to a first terminal of one of the pair of pull-up transistors and a second terminal of one of the pair of pull-down transistors, a drain and a gate stack structure, the method comprising:

• biasing the source or the drain of the access transistor with a ground voltage during a pre-program operation;
• and
• biasing the gate stack structure of the access transistor with a bias voltage greater than an operating voltage of the access transistor during the pre-program operation;
• and
• biasing the first reference node and the second reference node with the ground voltage during the pre-program operation,
• wherein the access transistor is turned on by biasing the gate stack structure of the access transistor with the operating voltage before and after the pre-program operation, the threshold voltage of the access transistor is greater than threshold voltages of the pair of pull-up transistors and the threshold voltage of the access transistor is smaller than threshold voltages of the pair of pull-down transistors regardless of logic state stored in the SRAM cell, the threshold voltage of the access transistor is a minimum voltage between a gate of the access transistor and the drain of the access transistor to form a conducting path between the source and the drain of the access transistor, and the threshold voltage of the access transistor is independent from the logic state stored in the SRAM.