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US 12,354,983 B2Granted
Fine-pitch joining pad structure
AssigneeInternational Business Machines Corporation
InventorsToyohiro Aoki, Koki Nakamura, Takashi Hisada
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes two integrated circuit (IC) chips. The first IC chip includes substrate, a spacer connected to the substrate and including holes, wherein at least one of the holes has a first shape, and solder bumps positioned in the holes, respectively. The second IC chip includes a substrate, electrode pads extending from the substrate and connected to the solder bumps, respectively. At least one of the electrode pads that corresponds to the at least one of the solder bumps has a second shape, and the first shape and the second shape are non-coextensive such that there is at least one gap between the first shape and the second shape when projected on each other.
Claims24
A semiconductor device comprising:
- a first integrated circuit (IC) chip comprising:
- a first substrate;
- a spacer connected to the first substrate and including a plurality of holes, wherein at least one of the plurality of holes has a first shape;
- and
- a plurality of solder bumps positioned in the plurality of holes, respectively;
- and
- a second IC chip comprising:
- a second substrate;
- a plurality of electrode pads extending from the second substrate and connected to the plurality of solder bumps, respectively, wherein at least one of the plurality of electrode pads that corresponds to the at least one of the plurality of solder bumps has a second shape;
- and
- non-conductive paste located atop the plurality of electrode pads and the second substrate, and configured to be displaced by the plurality of solder bumps on the first IC chip,
- wherein the first shape and the second shape are non-coextensive such that there is at least one gap between the first shape and the second shape when projected on each other.
9 more elements
A semiconductor device comprising:
- a first integrated circuit (IC) chip comprising:
- a first substrate;
- a spacer connected to the first substrate and including a plurality of holes, wherein at least one of the plurality of holes has a first shape;
- and
- a plurality of solder bumps positioned in the plurality of holes, respectively;
- and
- a second IC chip comprising:
- a second substrate;
- a plurality of electrode pads extending from the second substrate and connected to the plurality of solder bumps, respectively, wherein at least one of the plurality of electrode pads that corresponds to the at least one of the plurality of solder bumps has a second shape;
- and
- non-conductive paste located atop the plurality of electrode pads and the second substrate, and configured to be displaced by the plurality of solder bumps on the first IC chip,
- wherein the first shape and the second shape are non-coextensive such that there is at least one discontinuous lap between the first shape and the second shape when projected on each other.
9 more elements
A semiconductor device comprising:
- a first integrated circuit (IC) chip comprising:
- a substrate;
- a plurality of electrode pads extending from the substrate and configured to be connected to a plurality of solder bumps on a second IC chip, respectively, wherein at least one of the plurality of electrode pads has a pad periphery that is configured to be non- coextensive with its corresponding one of the plurality of solder bumps that has a bump periphery;
- and
- non-conductive paste located atop the plurality of electrode pads and the substrate, and configured to be displaced by the plurality of solder bumps on the second IC chip;
- and
- the second IC chip,
- wherein there is at least one gap between the pad periphery and the bump periphery when projected on each other, and there is at least one discontinuous lap between the pad periphery and the bump periphery when projected on each other.
5 more elements
A method of making a semiconductor device, the method comprising:
- forming a substrate, electrode, and a passivation layer of a first integrated circuit (IC) chip;
- forming a metal layer on the passivation layer and the electrode;
- forming a seed on the metal layer;
- and
- forming a cap on the seed to form a pad that is configured to be connected to a solder bump of a second IC chip, wherein a periphery of the pad is non-coextensive with a periphery of the solder bump such that:
- there is at least one gap between the periphery of the pad and the periphery of the solder bump when projected on each other;
- and
- there is at least one discontinuous lap between the periphery of the pad and the periphery of the solder bump when projected on each other.
5 more elements
A method of making a semiconductor device, the method comprising:
- forming a substrate of a first integrated circuit (IC) chip, wherein the substrate includes a protruding seed;
- forming an electrode on the substrate, including the seed;
- forming a passivation layer on the substrate and on the electrode;
- forming a metal layer on the passivation layer and the electrode;
- and
- forming a pad on the electrode that is configured to be connected to a solder bump of a second IC chip, wherein a periphery of the pad is non-coextensive with a periphery of the solder bump such that:
- there is at least one gap between the periphery of the pad and the periphery of the solder bump when projected on each other;
- and
- there is at least one discontinuous lap between the periphery of the pad and the periphery of the solder bump when overlayed on each other.
6 more elements
Dependencies are inferred from the claim text.