Liquid crystal display device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorHajime Kimura
Life of this patent
Estimating the term…
Abstract
To suppress a malfunction of a circuit due to deterioration in a transistor. In a transistor which continuously outputs signals having certain levels (e.g., L-level signals) in a pixel or a circuit, the direction of current flowing through the transistor is changed (inverted). That is, by changing the level of voltage applied to a first terminal and a second terminal (terminals serving as a source and a drain) every given period, the source and the drain are switched every given period. Specifically, in a portion which successively outputs signals having certain levels (e.g., L-level signals) in a circuit including a transistor, L-level signals having a plurality of different potentials (L-level signals whose potentials are changed every given period) are used as the signals having certain levels.
Claims7
A semiconductor device comprising:
- a first circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, and a twelfth transistor,
- wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,
- wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring,
- wherein one of a source and a drain of the second transistor is electrically connected to the first wiring,
- wherein the other of the source and the drain of the second transistor is electrically connected to a third wiring,
- wherein one of a source and a drain of the third transistor is electrically connected to a fourth wiring,
- wherein the other of the source and the drain of the third transistor is electrically connected to the second wiring,
- wherein a gate of the third transistor is directly connected to a gate of the first transistor,
- wherein one of a source and a drain of the fourth transistor is electrically connected to the fourth wiring,
- wherein a gate of the fourth transistor is directly connected to a gate of the second transistor,
- wherein one of a source and a drain of the fifth transistor is directly connected to a gate of the second transistor,
- wherein the other of the source and the drain of the fifth transistor is electrically connected to a fifth wiring,
- wherein a gate of the fifth transistor is directly connected to a gate of the first transistor,
- wherein one of a source and a drain of the sixth transistor is directly connected to a gate of the first transistor,
- wherein the other of the source and the drain of the sixth transistor is electrically connected to the fifth wiring,
- wherein a gate of the sixth transistor is directly connected to a gate of the second transistor,
- wherein one of a source and a drain of the seventh transistor is electrically connected to a gate of the second transistor,
- wherein the other of the source and the drain of the seventh transistor is electrically connected to a sixth wiring,
- wherein one of a source and a drain of the eighth transistor is electrically connected to the gate of the second transistor,
- wherein the other of the source and the drain of the eighth transistor is electrically connected to the fifth wiring, wherein one of a source and a drain of the ninth transistor is directly connected to a gate of the seventh transistor,
- wherein the other of the source and the drain of the ninth transistor is electrically connected to the sixth wiring,
- wherein a gate of the ninth transistor is electrically connected to the sixth wiring,
- wherein one of a source and a drain of the tenth transistor is directly connected to a gate of the seventh transistor,
- wherein the other of the source and the drain of the tenth transistor is electrically connected to the fifth wiring,
- wherein a gate of the tenth transistor is electrically connected to the gate of the first transistor,
- wherein one of a source and a drain of the eleventh transistor is electrically connected to the gate of the first transistor,
- wherein one of a source and a drain of the twelfth transistor is electrically connected to the gate of the first transistor, and
- wherein the other of the source and the drain of the twelfth transistor is electrically connected to the fifth wiring.
A semiconductor device comprising:
- a first circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, a ninth transistor, a tenth transistor, an eleventh transistor, and a twelfth transistor,
- wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,
- wherein one of a source and a drain of the second transistor is electrically connected to the first wiring,
- wherein one of a source and a drain of the third transistor is electrically connected to a fourth wiring,
- wherein a gate of the third transistor is directly connected to a gate of the first transistor,
- wherein one of a source and a drain of the fourth transistor is electrically connected to the fourth wiring,
- wherein a gate of the fourth transistor is directly connected to a gate of the second transistor,
- wherein one of a source and a drain of the fifth transistor is directly connected to a gate of the second transistor,
- wherein a gate of the fifth transistor is directly connected to a gate of the first transistor,
- wherein one of a source and a drain of the sixth transistor is directly connected to a gate of the first transistor,
- wherein a gate of the sixth transistor is directly connected to a gate of the second transistor,
- wherein one of a source and a drain of the seventh transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the eighth transistor is electrically connected to the gate of the second transistor,
- wherein one of a source and a drain of the ninth transistor is directly connected to a gate of the seventh transistor,
- wherein a gate of the ninth transistor is electrically connected to a sixth wiring, wherein one of a source and a drain of the tenth transistor is directly connected to a gate of the seventh transistor,
- wherein a gate of the tenth transistor is electrically connected to the gate of the first transistor,
- wherein one of a source and a drain of the eleventh transistor is electrically connected to the gate of the first transistor, and
- wherein one of a source and a drain of the twelfth transistor is electrically connected to the gate of the first transistor.
Dependencies are inferred from the claim text.