RF power amplifier integrated circuit having precision power detector

A semiconductor device comprising:

• a terminal RFOUT;
• a power amplifier that outputs a Radio Frequency (RF) output signal onto the terminal RFOUT, wherein the RF output signal has a power magnitude at the terminal RFOUT, and wherein the RF output signal has a frequency of at least one gigahertz;
• a terminal VDET;
• a terminal VREF;
• and
• power detector means for outputting onto the terminal VDET a detector output signal VDET, wherein the detector output signal VDET has a Direct Current (DC) reference voltage component VREF and a DC RF output power detect component VF, wherein the means is also for outputting a reference signal VREF onto the terminal VREF, wherein the power detector means outputs the signals VDET and VREF such that a voltage difference between the reference signal VREF on the terminal VREF and the detector output signal VDET on the terminal VDET varies in proportion to the power magnitude of the RF output signal within an accuracy of less than or equal to plus or minus 0.1 decibels (≤±0.1 dB) over a temperature range of from minus forty-five Celsius to plus eighty-five degrees Celsius, wherein the power detector means comprises:
• a voltage detector node VDET;
• an RF coupling circuit that couples an RF signal onto the voltage detector node VDET;
• an RF detector coupled between the voltage detector node VDET and a ground node, wherein the RF detector is taken from the group consisting of:
• a diode, a diode-connected transistor, a PN junction;
• and
• a temperature compensation circuit that provides an admittance between the voltage detector node VDET and the ground node, wherein the admittance decreases with respect to increasing temperature over the temperature range of from minus forty-five degrees Celsius to plus eighty-five degrees Celsius.

A semiconductor device comprising:

• a power amplifier that outputs a Radio Frequency (RF) output signal, wherein the RF output signal has a frequency of at least one gigahertz;
• a terminal VDET;
• a terminal VREF;
• and
• a power detector comprising:
• a voltage detector node VDET;
• a coupling circuit that couples an amount of the RF output signal output by the power amplifier onto the voltage detector node VDET;
• a first diode having an anode and a cathode, wherein the anode of the first diode is coupled to the voltage detector node VDET, and wherein the cathode of the first diode is coupled to a ground node;
• a temperature compensation circuit that provides an admittance between the voltage detector node VDET and the ground node, wherein the admittance decreases with respect to increasing temperature over the temperature range of from minus forty-five degrees Celsius to plus eighty-five degrees Celsius;
• a first low-pass filter that is coupled to the VDET node, wherein the first low-pass filter outputs a detector output signal VDET onto the terminal VDET;
• a voltage reference node VREF;
• a second diode having an anode and a cathode, wherein the anode of the second diode is coupled to the voltage reference node VREF, and wherein the cathode of the second diode is coupled to a ground node;
• a capacitor that provides a capacitance between the voltage reference node VREF and the ground node;
• and
• a second low-pass filter that is coupled to the VREF node, wherein the second low-pass filter outputs a reference signal VREF onto the terminal VREF.

A semiconductor device comprising:

• a power amplifier having an output lead, wherein the power amplifier outputs a Radio Frequency (RF) signal of at least one gigahertz onto the output lead;
• and
• a power detector circuit that is coupled to the output lead of the power amplifier;
• wherein the power detector circuit outputs a detector output signal VDET, wherein a voltage magnitude of the detector output signal VDET is indicative of a power magnitude of the RF signal output by the power amplifier, wherein the detector output signal VDET decreases as a power of the RF signal increases, and wherein the detector output signal VDET increases as the power of the RF signal decreases, and wherein the power detector circuit comprises:
• a voltage detector node;
• a bias circuit that biases the voltage detector node to a Direct Current (DC) voltage;
• an RF detector diode having an anode and a cathode, wherein the anode is coupled to the voltage detector node, and wherein the cathode is coupled to a ground node;
• and
• a temperature compensation circuit that provides an admittance between the voltage detector node and the ground node, wherein the admittance decreases with respect to increasing temperature over a temperature range.

A semiconductor device comprising:

• a power amplifier having an output lead, wherein the power amplifier outputs a Radio Frequency (RF) signal of at least one gigahertz onto the output lead;
• and
• a power detector circuit that is coupled to the output lead of the power amplifier;
• wherein the power detector circuit outputs a detector output signal VDET, wherein a voltage magnitude of the detector output signal VDET is indicative of a power magnitude of the RF signal output by the power amplifier, and wherein the power detector circuit comprises:
• a voltage detector node;
• a bias circuit that biases the voltage detector node to a Direct Current (DC) voltage;
• an RF detector diode having an anode and a cathode, wherein the anode is coupled to the voltage detector node, and wherein the cathode is coupled to a ground node;
• and
• a temperature compensation circuit that provides an admittance between the voltage detector node and the ground node, wherein the admittance decreases with respect to increasing temperature over a temperature range, wherein the voltage magnitude of the detector output signal VDET becomes more negative as the power of the RF signal increases, and wherein the voltage magnitude of the detector output signal VDET becomes less negative as the power of the RF signal decreases.

A method comprising:

• outputting a Radio Frequency (RF) output signal from a power amplifier onto a terminal RFOUT of an integrated circuit, wherein the RF output signal has a power magnitude at the terminal RFOUT, and wherein the RF output signal has a frequency of at least one gigahertz;
• outputting a signal VDET from a power detector of the integrated circuit onto a VDET terminal of the integrated circuit, wherein the signal VDET has a first Direct Current (DC) reference voltage component VREF and a second DC RF output power detect component VF, wherein a magnitude of the DC RF output power detect component VF varies in inverse proportion to the power magnitude of the RF output signal;
• and
• outputting a signal VREF from the power detector onto a VREF terminal of the integrated circuit, wherein the signals VREF and VDET are generated so that the voltage difference between the signals VREF and VDET varies in proportion to the power magnitude of the RF output signal within an accuracy of less than or equal to plus or minus 0.1 decibels over a temperature range of from minus forty-five degrees Celsius to plus eighty-five degrees Celsius.