Non-volatile ferroelectric storage element and devices comprising them

A non-volatile storage device provided with at least:

• i) an array in which non-volatile ferroelectric transistor storage elements each comprising at least a first conductive layer, a second conductive layer and a ferroelectric layer composed of a metal oxide between the first conductive layer and the second conductive layer, are arranged in a two-dimensional or three-dimensional manner, and
• ii) a control circuit,
• wherein the non-volatile ferroelectric transistor storage elements have between the ferroelectric layer and the first conductive layer and/or second conductive layer a buffer layer of a metal oxide having oxygen ion conductivity and containing a metal with a multiple valency, and
• wherein the non-volatile ferroelectric transistor storage elements have an interface layer composed of a single-layer film or a multilayer film between the first conductive layer and the ferroelectric layer, the interface layer as a whole having a higher dielectric constant than silicon oxide, and when the buffer layer is present between the first conductive layer and the ferroelectric layer, the interface layer is present between the first conductive layer and the buffer layer,
• wherein the non-volatile storage element satisfies at least one of the group consisting of the following A to C:
• A) the buffer layer is present between the second conductive layer and the ferroelectric layer and the buffer layer comprises cerium oxide CeOx wherein x is 1.5-2.0,
• B) the oxygen vacancy defect density of the buffer layer is lower than the oxygen vacancy defect density of the ferroelectric layer, and
• C) the second conductive layer has a two-layer structure of a barrier metal and a metal nitride, particularly W and TiN, that contacts the buffer layer, and
• wherein the first conductive layer comprises a doped semiconductor layer in contact with the interface layer, the doped semiconductor layer comprising a highly doped source region, a highly doped drain region and a doped channel forming region between the highly doped source and drain regions in contact with the interface layer, by which the non-volatile ferroelectric transistor storage element constitutes a one transistor ferroelectric memory cell whose gate insulating layer comprises the ferroelectric layer.

A non-volatile storage device provided with at least:

• i) an array in which non-volatile ferroelectric capacitor storage elements each comprising at least a first conductive layer, a second conductive layer and a ferroelectric layer composed of a metal oxide between the first conductive layer and the second conductive layer, are arranged in a two-dimensional or three-dimensional manner, and
• ii) a control circuit,
• wherein the non-volatile ferroelectric capacitor storage elements have between the ferroelectric layer and the first conductive layer and/or second conductive layer a buffer layer of a metal oxide having oxygen ion conductivity and containing a metal with a multiple valency,
• wherein the non-volatile ferroelectric capacitor storage element has an interface layer composed of a single-layer film or a multilayer film between the first conductive layer and the ferroelectric layer, the interface layer as a whole having a higher dielectric constant than silicon oxide, and when the buffer layer is present between the first conductive layer and the ferroelectric layer, the interface layer is present between the first conductive layer and the buffer layer,
• wherein the non-volatile storage element satisfies at least one of the group consisting of the following A to C;
• A) the buffer layer is present between the second conductive layer and the ferroelectric layer and the buffer layer comprises cerium oxide CeOx wherein x is 1.5-2.0, and/or
• B) the oxygen vacancy defect density of the buffer layer is lower than the oxygen vacancy defect density of the ferroelectric layer, and
• C) the second conductive layer has a two-layer structure of a barrier metal and a metal nitride, particularly W and TiN, that contacts the buffer layer, and
• wherein the non-volatile storage device further comprises select elements, preferably select transistors, and/or logic circuits, by which the non-volatile storage device constitutes non-volatile ferroelectric capacitor/transistor memory cells and/or nonvolatile logic devices.