Modulation and encoding method and apparatus, demodulation and decoding method and apparatus, device, and communication system

A method comprising:

• directly demodulating a first part of a first codeword to generate a first demodulated codeword, wherein the first codeword comprises the first part and a second part;
• performing assisted demodulation on the second part of the first codeword based on decoded information of a part of at least one second codeword, to generate a second demodulated codeword, the first codeword overlapping the at least one second codeword, and the part of the at least one second codeword and a bit of the second part of the first codeword being mapped to different bits of a symbol;
• and
• decoding the first demodulated codeword and the second demodulated codeword.

An apparatus comprising:

• a non-transitory memory storage comprising instructions;
• and
• one or more processors in communication with the memory storage, wherein the instructions, when executed by the one or more processors, cause the apparatus to:
• grade to-be-transmitted bits into a plurality of levels to generate bits of the plurality of levels;
• encode the bits of the plurality of levels to obtain codewords of the plurality of levels;
• and
• map the codewords of the plurality of levels to a symbol in a staggered manner, wherein
• the codewords of the plurality of levels comprise a first codeword, the first codeword is at a Yth level of the plurality of levels, the first codeword partially overlaps at least one codeword at a level other than the Yth level, and Y is an integer greater than or equal to 1;
• and
• the first codeword comprises M1 bits, the at least one codeword at the level other than the Yth level comprises M2 bits, and the first codeword partially overlapping the at least one codeword comprises:
• N bits of the first codeword and N bits of the at least one codeword at the level other than the Yth level are respectively mapped to different bits of the symbol in an overlapping manner, bits of the first codeword and the at least one codeword at the level other than the Yth level that are other than the N bits of the first codeword and the N bits of the at least one codeword at the level other than the Yth level do not overlap, wherein M1, M2, and N are positive integers, N<M1, and N<M2.

An apparatus comprising:

• a non-transitory memory storage comprising instructions;
• and
• one or more processors in communication with the memory storage, wherein the instructions, when executed by the one or more processors, cause the apparatus to:
• directly demodulate a first part of a first codeword, to generate a first demodulated codeword, wherein the first codeword comprises the first part and a second part;
• perform assisted demodulation on the second part of the first codeword based on decoded information of a part of at least one second codeword, to generate a second demodulated codeword, the first codeword overlapping the at least one second codeword, and the part of the at least one second codeword and a bit of the second part of the first codeword being mapped to different bits of a symbol;
• and
• decode the first demodulated codeword and the second demodulated codeword.