Butterfly network on load data return

A device comprising:

• a memory configured to store data;
• a streaming engine coupled to the memory and configured to retrieve the data from the memory, wherein the streaming engine includes a butterfly network that includes:
• a first circuit that includes:
• a set of inputs configured to receive the data;
• and
• a set of outputs configured to provide a first value, wherein the first circuit is configured to:
• in a first mode of operation, provide the first value such that an arrangement of a first subset of the data and a second subset of the data in the first value is the same as in the data as received by the first circuit;
• and
• in a second mode of operation, provide the first value such that the arrangement of the first subset of the data and the second subset of the data in the first value is different from in the data as received by the first circuit;
• a second circuit that includes:
• a set of inputs coupled to the set of outputs of the first circuit;
• and
• a set of outputs configured to provide a second value, wherein the second circuit is configured to:
• in a third mode of operation, provide the second value such that an arrangement of a third subset of the set of data that is part of the first subset of the data and a fourth subset of the set of data that is part of the first subset of the data in the second value is the same as in the first value;
• and
• in a fourth mode of operation, provide the second value such that the arrangement of the third subset of the data and the fourth subset of the data in the second value is different from in the first value;
• and selectably switch bit positions of a first subset of the second
• a processor coupled to the streaming engine and configured to receive the set of data via the butterfly network.

A method comprising:

• receiving a request for a set of data;
• retrieving the set of data from a memory;
• determining an operation to perform on the set of data;
• and
• based on the operation:
• determining whether to modify, using a first circuit, an arrangement of a first subset of the set of data and a second subset of the set of data in a first set of output data with respect to the set of data as retrieved from the memory;
• determining whether to modify, using a second circuit, an arrangement of a first subset of the first subset of the set of data and a second subset of the first subset of the set of data in a second set of output data with respect to the first set of output data;
• and
• determining whether to modify, using the second circuit, an arrangement of a first subset of the second subset of the set of data and a second subset of the second subset of the set of data in the second set of output data with respect to the first set of output data.