Triple-path clock and data recovery circuit, oscillator circuit and method for clock and data recovery

An oscillator circuit, comprising:

• a current-controlled oscillator, configured to generate an output clock according to a first control current, a second control current and a third control current, wherein a frequency of the output clock is controlled by the first control current and the second control current, and a phase of the output clock is controlled by the third control current;
• a first conversion circuit, coupled to the current-controlled oscillator, the first conversion circuit being configured to convert a first digital code to the first control current according to a first reference current;
• a second conversion circuit, coupled to the current-controlled oscillator and the first conversion circuit, the second conversion circuit being configured to convert a second digital code to the second control current, the first reference current and a second reference current, the second digital code being an accumulation result of a portion of the first digital code, wherein a rate of change of a code value of the second digital code is slower than a rate of change of a code value of the first digital code;
• and
• a third conversion circuit, coupled to the current-controlled oscillator and the second conversion circuit, the third conversion circuit being configured to convert a third digital code and the second reference current to the third control current.