Solid-state drive with multimode compression and error correction

A method for providing compression and error correction coding (ECC) in a solid-state drive (SSD), comprising:

• determining whether a data item is to be written to flash memory using a general-purpose mode or a zero-padding mode:
• in response to a determination that a data item is to be written into flash memory using the zero-padding mode:
• padding the data item with an all-zero tail to form an logical block address (LBA) data block of a predefined size;
• performing ECC coding on the LBA block to generate an ECC codeword;
• removing the all-zero tail from the ECC codeword to generate a shortened ECC codeword;
• and
• storing the shortened ECC codeword in flash memory.

A multimode solid-state drive (SSD), comprising:

• a plurality of flash memory chips (flash memory) addressable via physical block addresses (PBAs);
• and
• a controller chip that utilizes a mapping table to map logical block addresses (LBAs) to PBAs, wherein the controller chip implements a process that includes:
• receiving a data item to be written to flash memory;
• padding the data item with an all-zero tail to form an LBA data block of a predefined size;
• performing error correction coding (ECC) on the LBA block to generate an ECC codeword;
• removing the all-zero tail from the ECC codeword to generate a shortened ECC codeword;
• and
• storing the shortened ECC codeword in flash memory.