US 12,334,923 B1 · Multi-cycle reset mechanism for a chain of majority gates having non-linear polar material

Abstract

A multiplier cell is derived from a 1-bit full adder and an AND gate. The 1-bit full adder is derived from majority and/or minority gates. The majority and/or minority gates include non-linear polar material (e.g., ferroelectric or paraelectric material). A reset mechanism is provided to reset the nodes across the non-linear polar material. The multiplier cell is a hybrid of majority and/or minority gates and complementary metal oxide semiconductor (CMOS) based inverters and/or buffers. The adder uses a non-linear polar capacitor to retain charge with fewer transistors than traditional CMOS sequential circuits. The non-linear polar capacitor includes ferroelectric material, paraelectric material, or non-linear dielectric. Input signals are received by respective terminals of capacitors having non-linear polar material. The other terminals of these capacitors are coupled to a node where the majority function takes place for the inputs.

Claims20

Dependent claims

An apparatus comprising:

a first logic comprising a 5-input majority gate including a first input, a second input connected to the first input, a third input, a fourth input coupled to a carry input, and a fifth input coupled to a sum input, wherein an output of the first logic is a sum output;
a second logic coupled to the first logic, wherein the second logic includes a 3-input majority or minority gate, wherein the 3-input majority or minority gate includes a sixth input, a seventh input coupled to the carry input, and an eighth input coupled to the sum input;
and
a reset mechanism to reset the first logic and the second logic in at least two cycles, wherein the reset mechanism is to condition the first input, the second input, the third input, the fourth input, the fifth input, the sixth input, the seventh input, and the eighth input in a reset phase separate from an evaluation phase.

1 more element

Dependencies are inferred from the claim text.

Multi-cycle reset mechanism for a chain of majority gates having non-linear polar material

Life of this patent

Multi-cycle reset mechanism for a chain of majority gates having non-linear polar material

Life of this patent

Abstract

Claims20