Interconnection system for ground current optimization
AssigneeTE Connectivity Solutions GmbH
InventorsCharles Raymond Gingrich, III, Scott Eric Walton, Rutger Wilhelmus Smink
Life of this patent
Estimating the term…
Abstract
A printed circuit board having signal contact receiving vias positioned in rows and ground contact receiving vias positioned in line with the signal contact receiving vias in the rows. Signal integrity vias are positioned between the signal contact receiving vias, between the ground contact receiving vias, and between respective signal contact receiving vias and respective ground contact receiving vias. The signal integrity vias form a ground fence which reduces cross talk in a foot print of a connector mated with the printed circuit board.
Claims20
A printed circuit board comprising:
- signal contact receiving vias positioned in rows;
- ground contact receiving vias positioned in line with the signal contact receiving vias in the rows;
- signal integrity vias positioned between the signal contact receiving vias, between the ground contact receiving vias, and between respective signal contact receiving vias and respective ground contact receiving vias;
- the signal integrity vias forming a ground fence which reduces cross talk in a foot print of a connector mated with the printed circuit board.
A printed circuit board comprising:
- signal contact receiving vias positioned in rows;
- first ground contact receiving vias positioned in line with the signal contact receiving vias in the rows, the first ground contact receiving vias positioned between and edge of the circuit board and the signal contact receiving vias;
- second ground contact receiving vias positioned in line with the signal contact receiving vias in the rows, the second ground contact receiving vias positioned between respective signal contact receiving vias;
- the second contact receiving vias having center-to-center spacing which is less than the center-to-center spacing between the signal contact receiving vias.
A connector system comprising:
- a backplane connector having first signal contacts and first ground contacts;
- a daughtercard connector having second signal contacts and second ground contacts;
- a backplane circuit board comprising:
- backplane signal contact receiving vias positioned in rows;
- backplane ground contact receiving vias positioned in line with the backplane signal contact receiving vias in the rows;
- signal integrity vias positioned between the backplane signal contact receiving vias, between the backplane ground contact receiving vias, and between respective backplane signal contact receiving vias and respective backplane ground contact receiving vias;
- a daughtercard circuit board comprising:
- daughtercard signal contact receiving vias positioned in rows;
- first daughtercard ground contact receiving vias positioned in line with the daughtercard signal contact receiving vias in the rows, the first daughtercard ground contact receiving vias positioned between and edge of the daughtercard circuit board and the daughtercard signal contact receiving vias;
- second daughtercard ground contact receiving vias positioned in line with the daughtercard signal contact receiving vias in the rows, the second daughtercard ground contact receiving vias positioned between respective daughtercard signal contact receiving vias;
- the daughtercard second contact receiving vias having center-to-center spacing which is less than the center-to-center spacing between the daughtercard signal contact receiving vias.
Dependencies are inferred from the claim text.