Chip packaging structure and related inner lead bonding method
AssigneeSitronix Technology Corp.
InventorsYing-Chen Chang, Po-Chi Chen, Kuo-Wei Tseng
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Abstract
A chip packaging structure includes a chip and a film substrate. The chip is formed with a gold bump, and the film substrate is formed with an inner lead, wherein the gold bump includes a first bonding surface and a plurality of side walls. The gold bump is electrically connected to the inner lead through a eutectic material coverage layer, and the first bonding surface and at least one of the plurality of side walls are covered by the eutectic material coverage layer.
Claims10
A lead bonding method for a chip packaging structure, wherein the chip packaging structure comprises a chip and a film substrate, comprising:
- making a first bonding surface of a gold bump of the chip contact with a lead of the film substrate, wherein a width of the gold bump is smaller than a width of the lead, and wherein at least the first bonding surface or one of a plurality of side walls of the gold bump is a non-smooth surface;
- heating the gold bump and the lead up to a temperature range to form a eutectic material coverage between the gold bump and the lead, wherein the temperature range is from 400 to 500 Celsius degrees;
- and
- holding on for a predetermined period to make the first bonding surface and at least one of the plurality of side walls of the gold bump covered by the eutectic material coverage.
Dependencies are inferred from the claim text.