Piezoelectric materials for on-die thermal enhancement of hybrid bonding and associated systems and methods
AssigneeMicron Technology, Inc.
InventorsByung Hoon Moon, Kyle K. Kirby
Life of this patent
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Abstract
A semiconductor die is provided, comprising a semiconductor substrate; a dielectric layer over the semiconductor substrate; a bond pad in the dielectric layer, the bond pad including an exposed top surface that is recessed with respect to a surface of the dielectric layer opposite to the semiconductor substrate; and a region of piezoelectric material in the dielectric layer, wherein the region is located proximate to the bond pad to supply thermal energy to the bond pad in response to exposing the piezoelectric material to an externally-applied field.
Claims20
A semiconductor die, comprising:
- a semiconductor substrate;
- a dielectric layer over the semiconductor substrate;
- a bond pad in the dielectric layer, the bond pad including an exposed top surface that is recessed with respect to a surface of the dielectric layer opposite to the semiconductor substrate;
- and
- a region of piezoelectric material in the dielectric layer, wherein the region is located proximate to the bond pad to supply thermal energy to the bond pad in response to exposing the piezoelectric material to an externally-applied electric field.
A method, comprising:
- providing a first semiconductor die including a first dielectric layer, wherein the first dielectric layer includes a first bond pad with a first top surface exposed and recessed with respect to a first surface of the first dielectric layer, and wherein the first dielectric layer includes a region of piezoelectric material located proximate to the first bond pad;
- providing a second semiconductor die including a second dielectric layer, wherein the second dielectric layer includes a second bond pad with a second top surface exposed and recessed with respect to a second surface of the second dielectric layer;
- attaching the first and second semiconductor dies such that the first surface is in contact with the second surface to form a bonding interface and the first bond pad is aligned to and facing the second bond pad;
- and
- exposing the piezoelectric material to an externally-applied electric field to supply thermal energy to at least the first bond pad such that at least the first top surface of the first bond pad expands toward the bonding interface.
A semiconductor device assembly, comprising:
- a first semiconductor die including a first dielectric layer, wherein the first dielectric layer includes a first bond pad and a region of piezoelectric material proximate to the first bond pad;
- and
- a second semiconductor die including a second dielectric layer, wherein the second dielectric layer includes a second bond pad;
- wherein the first dielectric layer and the second dielectric layer are directly bonded by a dielectric-dielectric bond, and
- wherein the first bond pad and the second bond pad are directly bonded by a metallurgical bond.
Dependencies are inferred from the claim text.