Vertical field effect device and method of manufacturing

A semiconducting structure comprising a first vertical field effect transistor and a second vertical field effect transistor, each of the first vertical field effect transistor and the second vertical field effect transistor comprising:

• a substrate;
• a first electrode on the substrate and configured as either a source or a drain of the transistor;
• a second electrode configured as the other of the source and the drain of the transistor, wherein the second electrode at least partially overlaps the first electrode in an overlapping region;
• an active layer sandwiched between the first electrode and the second electrode;
• and
• a gate having a gate conductor portion and a gate insulating layer, the gate insulating layer being arranged between the gate conductor portion and the active layer,
• wherein the active layer comprises a 1D material arranged with its longitudinal axis substantially parallel to the substrate and/or the active layer comprise a 2D material arranged with its plane substantially parallel to the substrate and wherein the second vertical field effect transistor is disposed on top of the first field effect transistor or on a side of the first field effect transistor, and optionally wherein the first field effect transistor is either a P-type or N-type transistor and the second field effect transistor is the other of a P-type and N-type transistor.