Asymmetrical laminated circuit boards for improved electrical performance

A computing device comprising:

• a communication chip;
• and
• a printed circuit board assembly coupled to the communication chip, the printed circuit board assembly comprising:
• a first circuit board including a first footprint, the first circuit board further includes a plurality of first vertical vias extending between a first side and an opposing second side;
• a second circuit board including a second footprint smaller than the first footprint, the second circuit board further includes a plurality of second vertical vias extending between a subsequent first side and an opposing subsequent second side, wherein the second footprint forms one or more recessed portions at a perimeter of the first footprint;
• an adhesive layer coupling the first side to the subsequent first side;
• a plurality of third vertical vias extending through the first side and the subsequent first side;
• and
• one or more first devices coupled to the first side and disposed within the one or more recessed portions.

A method comprising:

• providing a first circuit board including a first footprint, the first circuit board further includes a plurality of first vertical vias extending between a first side and an opposing second side;
• providing a second circuit board including a second footprint smaller than the first footprint, the second circuit board further includes a plurality of second vertical vias extending between a subsequent first side and an opposing subsequent second side;
• forming one or more recessed portions at a perimeter of the first footprint;
• coupling the first side to the subsequent first side by an adhesive layer;
• extending a plurality of third vertical vias through the first side and the subsequent first side;
• and
• coupling one or more first devices to the first side, wherein the one or more first devices are disposed within the one or more recessed portions.