Method and multi-channel devices with anti-punch-through features
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMin Jiao, Ji-Yin Tsai, Da-Wen Lin, Hung-Ju Chou
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMin Jiao, Ji-Yin Tsai, Da-Wen Lin, Hung-Ju Chou
Estimating the term…
The present disclosure provide a method that includes receiving a substrate having a semiconductor surface of a first semiconductor material; forming an APT feature in the substrate; performing a prebaking process to the substrate with a first temperature T1; epitaxially growing an undoped semiconductor layer of the first semiconductor layer and a first thickness t1 on the substrate at a second temperature T2; epitaxially growing a semiconductor layer stack over the undoped semiconductor layer at a third temperature T3 less than T2, wherein the semiconductor layer stack includes first semiconductor layers and second semiconductor layers stacked vertically in an alternating configuration; patterning the semiconductor substrate, and the semiconductor layer stack to form a trench, thereby defining an active region being adjacent the trench; forming an isolation feature in the trench; selectively removing the second semiconductor layers; and forming a gate structure wrapping around each of the first semiconductor layers.
A method, comprising:
A method, comprising:
A method, comprising:
Dependencies are inferred from the claim text.