Ultra-thin super junction IGBT device and manufacturing method thereof
AssigneeShanghai Supersemiconductor Technology Co., Ltd.
InventorsYuzhou Wu, Jiuying Yu
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Abstract
The present invention discloses an ultra-thin super junction IGBT and a manufacturing method thereof, comprising: a metalized collector; a P-type collector region located on the metalized collector; an N-type FS layer located above the P-type collector region; an N-type FS isolating layer located above the N-type FS layer; a first N-type epitaxial layer located above the N-type FS isolating layer and a second N-type epitaxial layer located above the first N-type epitaxial layer; and a MOS structure located in the second N-type epitaxial layer. According to the present invention, thinning the chip thickness reduces forward conduction voltage drop and switching losses, while reducing thermal resistance and improving current conducting capability.
Claims13
An ultra-thin super junction insulated gate bipolar transistor (IGBT) comprising:
- a first N-type epitaxial layer;
- a first P column formed in the first N-type epitaxial layer and extending over an entire height of the first N-type epitaxial layer,
- the first P column being formed by forming a first trench in the first N-type epitaxial layer while leaving a portion of the first N-type epitaxial layer remaining below a lower end of the first trench, backfilling the first trench with P-type silicon, and then grinding across an entire width of a lower end of the first N-type epitaxial layer to remove all portions of the first N-type epitaxial layer below the lower end of the first trench and a portion of the lower end of the first trench to form a continuous bottom surface of the first P column and the first N-type epitaxial layer extending across an entire width of the first P column and the first N-type epitaxial layer;
- a second N-type epitaxial layer formed above the first N-type epitaxial layer,
- a P-type body region which is formed in the second N-type epitaxial layer and is not directly connected to the first P column;
- two N-type emitter regions formed in the P-type body region;
- an N-type field stop layer formed below the first P column and the first N-type epitaxial layer;
- a P-type collector region located below the N-type field stop layer;
- and
- a metallized collector located below the P-type collector region.
An ultra-thin super junction insulated gate bipolar transistor (IGBT) comprising:
- a first N-type epitaxial layer;
- two P columns formed in the first N-type epitaxial layer on opposite widthwise sides of the first N-type epitaxial layer, each P column extending over an entire height of the first N-type epitaxial layer, a lower end of the first N-type epitaxial layer and a lower end of each P column lying along a single surface extending across an entire width of the IGBT with no portion of the first N-type epitaxial layer extending below the lower ends of the P columns,
- a second N-type epitaxial layer formed above the first N-type epitaxial layer and directly contacting upper ends of the P columns and an upper end of the first N-type epitaxial layer;
- a P-type body region which is formed in the second N-type epitaxial layer and is not directly connected to the P columns;
- two N-type emitter regions formed in the P-type body region;
- an N-type field stop layer formed below the P columns and the first N-type epitaxial layer;
- a P-type collector region located below the N-type field stop layer;
- and
- a metallized collector located below the P-type collector region.
Dependencies are inferred from the claim text.