Semiconductor device and method for manufacturing a semiconductor device

A method of manufacturing a semiconductor device comprising:

• providing a substrate body with a surface;
• depositing a conductor on the surface;
• patterning and structuring the conductor;
• depositing a dielectric on the conductor and on exposed parts of the surface;
• and
• creating a bonding surface of the semiconductor device by removing part of the dielectric using a plurality of chemical-mechanical planarization, CMP, steps;
• wherein the bonding surface has surface topographies of less than 10 nm,
• wherein depositing the conductor comprises depositing a conductor material on the surface and depositing a sacrificial material on the conductor material, the sacrificial material being a conductive material that differs from the conductor material,
• wherein creating the bonding surface comprises removing at least part of the sacrificial material,
• wherein a thickness of the sacrificial material is less than or equal to a thickness off the conductor material, and
• wherein the dielectric and the sacrificial material form the bonding surface that is planarized to the surface topographies.

A method of manufacturing a semiconductor device comprising:

• providing a substrate body with a surface;
• depositing a conductor on the surface;
• patterning and structuring the conductor;
• depositing a dielectric on the conductor and on exposed parts of the surface;
• and
• creating a bonding surface of the semiconductor device by removing part of the dielectric using a plurality of chemical-mechanical planarization (CMP) steps;
• wherein the bonding surface has surface topographies of less than 10 nm;
• wherein depositing the conductor comprises depositing a conductor material on the surface and depositing a sacrificial material on the conductor material, the sacrificial material being a conductive material that differs from the conductor material;
• and
• creating the bonding surface comprises removing at least part of the sacrificial material,
• wherein a layer of the sacrificial material is left on the semiconductor device, and
• wherein the dielectric and the layer of the sacrificial material form the bonding surface that is planarized to the surface topographies.