Method of manufacturing electronic devices and corresponding electronic device
AssigneesSTMicroelectronics S.r.l., Stmicroelectronics Pte Ltd
InventorsRoberto Tiziani, Laurent Herard
Life of this patent
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Abstract
A substrate includes electrically-conductive tracks. A semiconductor chip is arranged on the substrate and electrically coupled to selected ones of the electrically-conductive tracks. Containment structures are provided at selected locations on the electrically-conductive tracks, where the containment structures have respective perimeter walls defining respective cavities. Each cavity is configured to accommodate a base portion of a pin holder. These pin holders are soldered to the electrically-conductive tracks within the cavities defined by the containment structures. Each containment structure may be formed by a ring of resist material configured to receive solder and maintain the pin holders in a desired alignment position.
Claims14
A method, comprising:
- providing a plurality of substrates having electrically-conductive tracks;
- arranging a semiconductor chip on each substrate and electrically coupling the semiconductor chip to selected ones of said electrically-conductive tracks;
- attaching said plurality of substrates onto a common base plate;
- then providing containment structures at selected locations on said electrically-conductive tracks, wherein said containment structures have respective perimeter walls which define cavities having a size and shape configured to respectively accommodate a base portion of pin holders;
- and
- soldering said pin holders within said cavities defined by said containment structures on said electrically-conductive tracks.
A method, comprising:
- providing a substrate having electrically-conductive tracks;
- arranging a semiconductor chip on the substrate and electrically coupling the semiconductor chip to selected ones of said electrically-conductive tracks;
- attaching the substrate to a base plate;
- providing a set of alignment marks on one or more of said base plate and said substrate, wherein the set of alignment marks are indicative of reference positions;
- providing pads of resist material at selected locations on said electrically-conductive tracks;
- based on said reference positions indicated by the set of alignment marks, selectively removing resist material from inner portions of said pads to respectively form perimeter walls of containment structures which define cavities;
- and
- soldering pin holders within said cavities defined by said containment structures on said electrically-conductive tracks;
- wherein each cavity has a size and shape configured to accommodate a base portion of the pin holder.
Dependencies are inferred from the claim text.