RFID tag clock frequency reduction during tuning

A Radio Frequency Identification (RFID) integrated circuit (IC) comprising:

• a variable impedance;
• and
• a tuning circuit coupled to and configured to tune the variable impedance, wherein the IC is configured to:
• upon power-up, determine that tuning of the variable impedance is to occur and select a first clock frequency to use during the tuning;
• extract a first power from an RF wave insufficient for the IC to operate according to a protocol;
• cause the tuning circuit to tune, using the first clock frequency, the variable impedance to increase power extracted from the RF wave;
• and
• after the tuning circuit tunes the variable impedance:
• extract a second power from the RF wave higher than the first power and sufficient for the IC to operate according to the protocol;
• select a second clock frequency higher than the first clock frequency to use for IC operation;
• and
• operate using the second clock frequency.

A Radio Frequency Identification (RFID) integrated circuit (IC) comprising:

• a variable impedance;
• and
• a tuning circuit coupled to and configured to tune the variable impedance;
• wherein the IC is configured to:
• upon power-up, extract a first power from an RF wave and determine that tuning of the variable impedance is to occur;
• while extracting the first power and operating at a first clock frequency sufficient for the tuning circuit to tune the variable impedance but insufficient for the IC to operate according to a protocol, cause the tuning circuit to tune the variable impedance to increase power extracted from the RF wave;
• and
• after the tuning circuit tunes the variable impedance, operate at a second clock frequency different than the first clock frequency and extract a second power from the RF wave higher than the first power.