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US 12,321,713 B2Granted
Switched capacitor vector-matrix multiplier
AssigneeReconceive AI, Inc.
InventorBehdad Youssefi
Life of this patent
Estimating the term…
Abstract
Methods and apparatuses enable a general-purpose low power analog vector-matrix multiplier. A switched capacitor matrix multiplier may comprise a plurality of successive approximate registers (SAR) operating in parallel, each SAR having a SAR digital output; and a plurality of Analog Multiply-and-Accumulate (MAC) units for multiplying and accumulating and scaling bit-wise products of a digital weight matrix with a digital input vector, wherein each MAC unit is connected in series to a SAR of the plurality of SARs.
Claims9
A switched capacitor matrix multiplier, comprising:
- a plurality of successive approximation registers (SAR) operating in parallel, each SAR having a SAR digital output;
- and
- a plurality of Analog Multiply-and-Accumulate (MAC) units for multiplying and accumulating and scaling bit-wise products of a digital weight matrix with a digital input vector, each MAC unit is connected in series to a SAR of the plurality of SARs.
Dependencies are inferred from the claim text.