Semiconductor memory device

A semiconductor memory device, comprising:

• a substrate;
• a plurality of source lines extending in a first direction on the substrate;
• a plurality of word lines crossing the source lines and extending in a second direction different from the first direction;
• a plurality of bit lines crossing the source lines and the word lines and extending in a third direction different from the first direction and the second direction;
• and
• a plurality of memory cells disposed at intersections between the source lines, the word lines, and the bit lines,
• wherein each of the memory cells includes a semiconductor pattern including a source region, a drain region, and a channel region between the source region and the drain region,
• wherein the first, second, and third directions are parallel to a top surface of the substrate, and
• wherein the channel region of the semiconductor pattern extends in a fourth direction perpendicular to the top surface of the substrate.

A semiconductor memory device, comprising:

• a substrate;
• a source line extending in a first direction on the substrate;
• an interlayer dielectric layer having a trench that extends in a second direction crossing the source line, the second direction being different from the first direction;
• a semiconductor pattern disposed in the trench, the semiconductor pattern defining a gap region;
• a word line disposed in the gap region of the semiconductor pattern;
• a gate dielectric pattern disposed between the word line and the semiconductor pattern;
• and
• a bit line disposed on the interlayer dielectric layer, the bit line extending in a third direction different from the second direction,
• wherein the bit line is vertically spaced apart from the word line and is in contact with the semiconductor pattern.