Delay circuit
AssigneeSynopsys, Inc.
InventorsShishir Kumar, Vinay Kumar
Life of this patent
Estimating the term…
Abstract
A delay circuit. In some embodiments, a non-transitory computer readable medium includes stored instructions, which when executed by a processor, cause the processor to generate a digital representation of a circuit including: a first inverter, having an input, an output, and two power supply connections; a first current source, electrically coupled in series between a power supply conductor and a power supply connection of the two power supply connections of the first inverter; and a ramp generator circuit, electrically coupled to the input of the first inverter.
Claims14
A non-transitory computer readable medium comprising stored instructions, which when executed by a processor, cause the processor to generate a digital representation of a circuit comprising:
- a first inverter, having an input, an output, and two power supply connections;
- a first current source, electrically coupled in series between a power supply conductor and a power supply connection of the two power supply connections of the first inverter;
- and
- a ramp generator circuit, electrically coupled to the input of the first inverter, the ramp generator circuit comprising:
- a capacitor, electrically coupled to the input of the first inverter;
- a second current source electrically coupled to the capacitor;
- and
- a first switching transistor electrically coupled in series between the second current source and the capacitor.
A circuit comprising:
- a first inverter, having an input, an output, and two power supply connections;
- a first current source, electrically coupled in series between a power supply conductor and a power supply connection of the first inverter;
- and
- a ramp generator circuit, electrically coupled to the input of the first inverter, the ramp generator circuit comprising:
- a capacitor, electrically coupled to the input of the first inverter;
- a second current source electrically coupled to the capacitor;
- and
- a first switching transistor electrically coupled in series between the second current source and the capacitor.
A method, comprising:
- receiving, by a delay circuit, an input signal, the input signal having a transition, at a transition time;
- charging a capacitor during a time interval preceding the transition time;
- discharging the capacitor, through a current source, during a time interval following the transition time, until a voltage on the capacitor equals a transition voltage;
- and
- when the voltage on the capacitor equals the transition voltage, toggling an output signal of the delay circuit.
Dependencies are inferred from the claim text.