Interface system and memory system including the same

An interface system between a memory device and a memory controller, comprising:

• at least one input/output driving circuit including:
• a pull-down driver including a first transistor and a second transistor which are electrically coupled between a pad and a ground node;
• and
• a gate control logic including a third transistor and a fourth transistor which are electrically coupled between the pad and a first supply voltage terminal, the gate control logic configured to receive a pad voltage provided from the pad and generate a feedback voltage,
• wherein a source voltage level of the second transistor is controlled by a control signal generated based on a clock signal and an enable signal.

A memory system comprising:

• a memory device configured to store data;
• and
• a memory controller configured to communicate with the memory device by an input/output driving circuit,
• wherein the input/output driving circuit comprises:
• a pull-down driver including a first transistor and a second transistor which are electrically coupled between a pad and a ground node;
• and
• a gate control logic including a third transistor and a fourth transistor which are electrically coupled between the pad and a first terminal receiving a first driving voltage, the gate control logic being configured to receive a pad voltage provided from the pad and generate a feedback voltage,
• wherein a source voltage level of the second transistor is controlled by a control signal generated based on a clock signal and an enable signal.