Method for operating a converter, converter and computer program product

A converter, comprising:

• a control arrangement and
• a number M of phase-legs, wherein each of the number M of phase-legs comprises at least a cell with a capacitor and semiconductor switches,
• wherein the converter is realized as a modular-multilevel converter and is configured to execute-detecting whether the converter has to be set into one mode of a group comprising:
• a static synchronous compensator mode in case a voltage of at least one terminal on the first side of the converter has constantly zero Volt and/or a machine coupled to the second side of the converter has a standstill, or
• a grid unbalance mode,
• generating mode control signals (MCS) depending on the detected mode,
• generating balance voltage reference signals (ubal,ref) depending on a first side frequency (ωg), a second side frequency (ωm), second side current reference signals (im,ref), measured phase-leg capacitor signals (uCΣ,yxn) and the mode control signals (MCS) by the control arrangement,
• generating a phase-leg control signal (uref) for each of the number M of phase-legs depending on first side voltage reference signals (ug,conv,ref), second side voltage reference signals (um,conv,ref) and the balance voltage reference signals (ubal,ref) by a reference generator of the control arrangement,
• generating cell control signals by a modulator of the control arrangement as a function of the phase-leg control signals (uref), and
• providing the cell control signals to the semiconductor switches of the cells.

A non-transitory computer program product, comprising instructions to cause a converter to execute:

• detecting whether the converter has to be set into one mode of a group comprising:
• a static synchronous compensator mode in case a voltage of at least one terminal on the first side of the converter has constantly zero Volt and/or a machine coupled to the second side of the converter has a standstill, or
• a grid unbalance mode,
• generating mode control signals (MCS) depending on the detected mode,
• generating balance voltage reference signals (ubal,ref) depending on a first side frequency (ωg), a second side frequency (ωm), second side current reference signals (im,ref), measured phase-leg capacitor signals (uCΣ,yxn) and the mode control signals (MCS) by the control arrangement,
• generating a phase-leg control signal (uref) for each of the number M of phase-legs depending on first side voltage reference signals (ug,conv,ref), second side voltage reference signals (um,conv,ref) and the balance voltage reference signals (ubal,ref) by a reference generator of the control arrangement,
• generating cell control signals by a modulator of the control arrangement as a function of the phase-leg control signals (uref), and
• providing the cell control signals to the semiconductor switches of the cells.