Rectifier circuit and receiver circuit

A receiver circuit, comprising:

• an antenna circuit;
• and
• a rectifier circuit configured to generate an output signal at an output terminal of the rectifier circuit and comprising:
• a first switch set that has a first input terminal and a second input terminal and is configured to rectify a first signal from the first input terminal of the first switch set to update the output signal;
• a second switch set that has a third input terminal and a fourth input terminal and is configured to rectify a second signal from the third input terminal of the second switch set to update the output signal, wherein the first signal and the second signal are inverted;
• a bias circuit configured to provide a first bias voltage to the second input terminal of the first switch set and to provide a second bias voltage to the fourth input terminal of the second switch set;
• and
• a first match circuit and a second match circuit which are configured to match an impedance of the antenna circuit with an impedance of the rectifier circuit,
• wherein the first match circuit has a first output terminal coupled to the first input terminal of the first switch set and a second output terminal coupled to the fourth input terminal of the second switch set, and
• the second match circuit has a third output terminal coupled to the third input terminal of the second switch set and a fourth output terminal coupled to the second input terminal of the first switch set.

A rectifier circuit, comprising:

• a first capacitor and a second capacitor, wherein a first terminal of the first capacitor and a first terminal of the second capacitor are coupled to a first input terminal of the rectifier circuit;
• a third capacitor and a fourth capacitor, wherein a first terminal of the third capacitor and a first terminal of the fourth capacitor are coupled to a second input terminal of the rectifier circuit;
• a first resistor, wherein a first terminal of the first resistor is coupled to a second terminal of the fourth capacitor and a second terminal of the first resistor is grounded;
• a second resistor, wherein a first terminal of the second resistor is coupled to a second terminal of the second capacitor and a second terminal of the second resistor is grounded;
• a first transistor, wherein a gate terminal of the first transistor is coupled to the first terminal of the first resistor, a first source/drain terminal of the first transistor is coupled to a second terminal of the first capacitor and a second source/drain terminal of the first transistor is coupled to an output terminal of the rectifier circuit;
• a second transistor, wherein a gate terminal of the second transistor is coupled to first terminal of the first resistor, a first source/drain terminal of the second transistor is coupled to the second terminal of the first capacitor and a second source/drain terminal of the second transistor is grounded;
• a third transistor, wherein a gate terminal of the third transistor is coupled to the first terminal of the second resistor, a first source/drain terminal of the third transistor is coupled to a second terminal of the third capacitor and a second source/drain terminal of the third transistor is coupled to the output terminal;
• and
• a fourth transistor, wherein a gate terminal of the fourth transistor is coupled to the first terminal of the second resistor, a first source/drain terminal of the fourth transistor is coupled to the second terminal of the third capacitor and a second source/drain terminal of the fourth transistor is grounded,
• wherein the first to the fourth capacitors, the first resistor, the second resistor and the first to the fourth transistors are configured to cooperate to rectify a differential signal pair received from the first input terminal and the second input terminal and to output a rectified signal at the output terminal.