Semiconductor devices with metal intercalated high-k capping

A method comprising:

• providing a structure having a substrate, a semiconductor channel layer over the substrate, an interfacial oxide layer over the semiconductor channel layer, and a high-k gate dielectric layer over the interfacial oxide layer, wherein the semiconductor channel layer includes germanium;
• forming a metal nitride layer over the high-k gate dielectric layer;
• after the forming of the metal nitride layer, performing a first treatment to the structure using a metal-containing gas;
• after the performing of the first treatment, depositing a passivation layer over the metal nitride layer, wherein the passivation layer includes silicon;
• after the depositing of the passivation layer, annealing the structure such that a metal intermixing layer is formed over the high-k gate dielectric layer, wherein the metal intermixing layer includes a metal oxide having metal species from the high-k gate dielectric layer and additional metal species from the metal-containing gas;
• removing the passivation layer and the metal nitride layer and keeping at least a portion of the metal intermixing layer in the structure;
• and
• forming a metal gate electrode over the high-k gate dielectric layer and the metal intermixing layer.

A method, including:

• providing a structure having a semiconductor channel layer, an interfacial layer over the semiconductor channel layer, and a high-k gate dielectric layer over the interfacial layer, wherein the semiconductor channel layer includes germanium;
• forming a metal nitride layer over the high-k gate dielectric layer;
• depositing a first silicon layer over the metal nitride layer;
• performing a treatment to the structure using a metal-containing gas;
• forming a second silicon layer over the metal nitride layer;
• performing an annealing process to form a metal intermixing layer over the high-k gate dielectric layer;
• removing layers down to the metal intermixing layer;
• and
• forming a metal gate electrode over the high-k gate dielectric layer and the metal intermixing layer.