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US 12,315,547 B2Granted
Refresh operation in multi-die memory
OwnerMatthew A. Prather, Thomas H. Kinsleyinventors
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Abstract
Methods, apparatuses, and systems for staggering refresh operations to memory arrays in different dies of a three-dimensional stacked (3DS) memory device are described. A 3DS memory device may include one die or layer of that controls or regulates commands, including refresh commands, to other dies or layers of the memory device. For example, one die of the 3DS memory may delay a refresh command when issuing the multiple concurrent memory refreshes would cause some problematic performance condition, such as high peak current, within the memory device.
Claims18
A method, comprising:
- issuing a first refresh command to a first rank of a memory device;
- delaying issuance of a second refresh command to a second rank of the memory device by a duration, wherein delaying the issuance of the second refresh command limits a maximum refresh current of the memory device, wherein the duration is based at least in part on a product between a value and a refresh cycle time associated with refresh operations at the memory device;
- and
- issuing the second refresh command to the second rank after expiration of the duration.
1 more element
A method, comprising:
- receiving, at a memory device, a first refresh command for a first rank of the memory device and a second refresh command for a second rank of the memory device;
- sending the first refresh command to the first rank of the memory device;
- delaying the second refresh command to the second rank of the memory device by a duration, wherein delaying the second refresh command limits a maximum refresh current of the memory device, wherein the duration is based at least in part on a product of a value and a refresh cycle time associated with refresh operations at the memory device;
- and
- sending the second refresh command to the second rank after expiration of the duration.
2 more elements
A method, comprising:
- issuing a first refresh command to a first rank of a memory device;
- and
- issuing a second refresh command to a second rank of the memory device, wherein execution of the second refresh command at the second rank is delayed relative to execution of the first refresh command at the first rank by a duration, and wherein delaying the execution of the second refresh command by the duration limits a maximum refresh current of the memory device, wherein the duration is based at least in part on a product of a value and a refresh cycle time associated with refresh operations at the memory device.
Dependencies are inferred from the claim text.