Amplifier circuit

A method, comprising:

• configuring at least two transistors of an amplifier circuit for operation in a saturation region, a first of the at least two transistors being connected to a drive PMOS transistor, a second of the at least two transistors being connected to a drive NMOS transistor;
• configuring the drive PMOS transistor and the drive NMOS transistor for operation in a subthreshold region;
• powering the amplifier circuit;
• inputting a signal to a differential input of the amplifier circuit;
• and
• outputting an amplified signal at an output node of the amplifier circuit.

A duty cycle corrector, comprising:

• an input connected to a clock signal;
• a power node;
• a ground node;
• an output node;
• a first circuit connected to the input;
• a second circuit comprising a PMOS transistor, the second circuit being connected to the power node;
• a third circuit comprising an NMOS drive transistor, the third circuit being connected to the ground node;
• and
• a fourth circuit coupled to the PMOS transistor and the NMOS drive transistor, the fourth circuit being connected to the output node,
• wherein:
• the third circuit comprises at least two boosting stages;
• each of the at least two boosting stages comprises matching transistors;
• one or more resistive elements connect the at least two boosting stages;
• the matching transistors comprise a pair of PMOS transistors and a pair of NMOS transistors;
• the pair of PMOS transistors have the same dimensions;
• the pair of NMOS transistors have the same dimensions;
• and
• values of the one or more resistive elements are selected to set a gate voltage of the PMOS transistor and the NMOS transistor for operation in a subthreshold region.